Hardware/Software Support and Algorithms for Dynamic Backlight Scaling in TFT LCDs

Sponsor: National Science Foundation – Computing Processes and Artifacts

Project Summary: Display components have become a key focus of efforts for maximization of the battery lifetime in a wide range of portable, display-equipped, microelectronic systems and products. A particularly effective technique in reducing the power consumption of all kinds of displays is the dynamic backlight scaling technique, where the intensity of the backlight lamp and the LCD transmittance function are changed concurrently and in proportion so that the same visual perception is created in the human eyes at much lower levels of power consumption. This research therefore aims to develop spatiotemporal and/or color-aware backlight scaling techniques for pixel transformation of the displayed still images or video streams so as to maximize the energy saving in a target platform. The new techniques , which take advantage of the human visual system characteristics to minimize distortion between the original and backlight-scaled images/videos, will be implemented and demonstrated on the Apollo Testbed II hardware platform. The broader impact of the research is to significantly reduce the power consumption of typical handheld devices, increasing their discharge-cycle lifetime, thereby, enabling more widespread and convenient use of such devices. The backlight dimming technology can also be applied in AC-powered systems where the key concern is the energy cost to the individual user as well as the society at large. This technology has the potential to reduce the typical energy bill of a desktop computer by 30% or so (when the system is being used). This research, if successful, will expedite introduction of advanced display technologies (such as LED-based backlighting for LCDs, or organic LED-based displays) since it will reduce their power cost without sacrificing quality.LCD (Liquid Crystal Display) TVs are becoming the main stream in FPD (Flat Panel Display) market. In spite of their superb performances (e.g. vivid image representation and high native resolution) compared to other types of TVs such as PDP (Plasma Display Panel), LCDs suffer from a number of well-known shortcomings such as motion blur artifact, low contrast ratio, and low brightness. Furthermore, backlighting for the modern LCD panels is typically done with the aid of a 2-D array of individually luminance-controlled white LED’s, each of whom serves as the backlight for a fixed-size region on the LCD panel. We are currently investigating dimming and scanning of the 2-D LED array with the aid of appropriately time-shifted and duty cycle adjusted Pulse Width Modulation (PWM) signals. The goal is both to minimize the total power dissipation of the LED array drivers while improving the static contrast ratio and eliminating the motion blur artifact in LCD TVs. More precisely, we are developing a 2-D PWM-driven backlight dimming technique which simultaneously dims certain regions of the LCD screen and sets the pixel values by applying an optimal pixel value transformation function. In addition, we are investigating a 2-D backlight scanning technique which determines a new duty cycle for the PWM signal for each white LED driver so as to preserve the original backlight intensity for the LED while ensuring that the LED can be completely turned off for a period of time during each frame. This off time, which is about 8ms in the target display system, greatly reduces the motion blur. At the same time, if the pixel value updates due to refresh operation take place during this off time, the viewer will only see the changed pixel values corresponding to the new frame and will not be subjected to effects arising from pixel value transitions while the pixels are being exposed to back light. Both of the proposed ideas are being implemented in a Xilinx FPGA (Spartan 3E) and tested on a Samsung 40-inch LCD TV.

B2Sim: A Fast Micro-Architecture Simulator Based on Basic Block Characterization — State-of-the-art architectural simulators support cycle accurate pipeline execution of application programs. However, it takes days and weeks to complete the simulation of even a moderate-size program. During the execution of a program, program behavior does not change randomly but changes over time in a predictable/periodic manner. This behavior provides the opportunity to limit the use of a pipeline simulator. More precisely, in a CODED-06 paper, we presented a hybrid simulation engine, named B2Sim for (cycle-characterized) Basic Block based Simulator, where a fast cache simulator e.g., sim-cache and a slow pipeline simulator e.g., sim-outorder are employed together. B2Sim reduces the runtime of architectural simulation engines by making use of the instruction behavior within executed basic blocks. We integrated B2Sim into SimpleScalar and achieved on average a factor of 3.3 times speedup on the SPEC2000 benchmark and Media-bench programs compared to conventional pipeline simulator while maintaining the accuracy of the simulation results with less than 1% CPI error on average.

Backlight Dimming in Power-Aware Mobile Displays — In a DAC-06 paper, we introduced a temporally-aware backlight scaling technique for video streams. The goal is to maximize energy saving in the display system by means of dynamic backlight dimming subject to a video distortion tolerance. The video distortion comprises of (1) an intra-frame (spatial) distortion component due to frame-sensitive backlight scaling and transmittance function tuning and (2) an inter-frame (temporal) distortion component due to large-step backlight dimming across frames modulated by the psychophysical characteristics of the human visual system. The proposed backlight scaling technique is capable of efficiently computing the flickering effect online and subsequently using a measure of the temporal distortion to appropriately adjust the slack on the intra-frame spatial distortion, thereby, achieving a good balance between the two sources of distortion while maximizing the backlight dimming-driven energy saving in the display system and meeting an overall video quality figure of merit.
The proposed dynamic backlight scaling approach is amenable to highly efficient hardware realization and has been implemented on the Apollo Testbed II. Actual current measurements demonstrate the effectiveness of proposed technique compared to the previous backlight dimming techniques, which have ignored the temporal distortion effect.

DTM: Dynamic Tone Mapping for Backlight Scaling — In a DAC-05 paper, we presented an approach for pixel transformation of the displayed image to increase the potential energy saving of the backlight scaling method. The proposed approach takes advantage of human visual system (HVS) characteristics and tries to minimize distortion between the perceived brightness values of the individual pixels in the original image and those of the backlight-scaled image. This is in contrast to previous backlight scaling approaches which simply match the luminance values of the individual pixels in the original and backlight-scaled images. Moreover, the proposed dynamic backlight scaling approach, which is based on tone mapping, is amenable to highly efficient hardware realization because it does not need information about the histogram of the displayed image. Experimental results show that the dynamic tone mapping for backlight scaling method results in about 35% power saving with an effective distortion rate of 5% and 55% power saving for a 20% distortion rate.

HEBS: Histogram Equalization for Backlight Scaling — In a DATE-05 paper, we presented a method for finding a pixel transformation function that minimizes the backlight intensity while maintaining a pre-specified image distortion level for a liquid crystal display. This is achieved by first finding a pixel transformation function, which maps the original image histogram to a new histogram with lower dynamic range. Next the contrast of the transformed image is enhanced so as to compensate for the brightness loss that arises from backlight dimming. The proposed approach relies on an accurate definition of the image distortion, which accounts for both the pixel value differences and a model of the human visual system and is amenable to highly efficient hardware realization. Experimental results show that histogram equalization for backlight scaling results in about 45% power saving with an effective distortion rate of 5% and 65% power saving for a 20% distortion rate. This is higher power savings compared to previously reported dynamic backlight scaling approaches.