Project URL: SPORT Lab
We investigate power estimation and low power design of CMOS VLSI circuits and systems all different abstraction levels. Our emphasis is on developing mathematically rigorous analysis and optimization algorithms and power-aware design methodologies for solving various problems of practical interest and import. Our most recent work has focused on energy-efficient enterprise computing, reliability-power efficiency tradeoffs in VLSI circuits and systems, design of hybrid energy storage systems, dynamic power/thermal management in chip multiprocessors, core-level voltage and frequency scaling, low power displays, ASIC design with power gating and multiple voltage islands, and current source-based modeling of power and timing in VLSI circuits. More details about various ongoing projects are included below.