Sponsor: Intelligence Advanced Research Projects Activity (IARPA)
Description: As Moore’s law dying for CMOS, novel technology with higher operation rate, better power efficiency and scale-ability is badly demanded for future chips. SFQ is one of the most promising saplings using single quantum flux as the compute unit, holding an advantage of fast speed and low dynamic power. This project is to build a RSFQ cell library, develop novel circuit and system structure for the SFQ logic family and enhance the static power performance for SFQ circuits.
Related work:
- H. Cong, N. K. Katam and M. Pedram, “Design of an SFQ Full Adder as a Single-Stage Gate,” 2019 IEEE International Superconductive Electronics Conference (ISEC), Riverside, CA, USA, 2019, pp. 1-3.