Sponsor: Intelligence Advanced Research Projects Activity (IARPA)
In this project new algorithms for placement and clock network synthesis for large scale SFQ circuits a re developed and implemented. The goal is to maximize the circuit performance in terms of maximum clock frequency, considering special characteristics of SFQ technology.
- SN Shahsavani, TR Lin, A Shafaei, CJ Fourie, M Pedram“An Integrated Cell Placement and Interconnect Synthesis Tool for Large-scale SFQ Logic Circuits,IEEE Transactions on Applied Superconductivity 27 (4), 1-8
- SN Shahsavani, A Shafaei, M Pedram, A placement algorithm for superconducting logic circuits based on cell grouping and super-cell placement, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018.