[ Books | Book Chapters | Journal Publications | Preprints | Confernece Publications | US Patents]

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M. Pedram and J. Rabaey (editors).

*Power Aware Design Methodologies*, Kluwer Academic Publishers, Boston, 2002.J. Chang and M. Pedram.

*Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods*, Kluwer Academic Publishers, Boston, 1999.S. Iman and M. Pedram.

*Logic Synthesis for Low Power VLSI Designs*, Kluwer Academic Publishers, Boston, 1997.J. Rabaey and M. Pedram (editors),

*Low Power Design Methodologies*, Kluwer Academic Publishers, Boston, 1995.M. Pedram (editor).

*ACM-SIGDA Multimedia Monograph Series*, Volumes 1-12, ACM Publications.

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A. Fayyazi, M. Ansari, M. Kamal, A. Afzali-Kusha, and M. Pedram.

Inverter-based memristive neuromorphic circuit for ultra-low-power IoT smart applications,

*in IET’s book titled Hardware Architectures for Deep Learning*, 2020.Y. Wang, S. Chen, and M. Pedram.

Service level agreement-based joint application environment assignment and resource allocation in cloud computing systems,

in Springer’s book titled*Embedded Robotics and Cloud Computing*, to appear in 2018.M. Hemmat, M. Kamal, A. Afzali-Kusha, and M. Pedram.

Robust Hybrid TFET-MOSFET Circuits in Presence of Process Variations and Soft Errors,

in*VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability*, Editors: T. Hollstein, J. Raik, S. Kostin, A. Tšertov, I. O'Connor, and R. Reis, Part of the IFIP Advances in Information and Communication Technology book series, Springer, 2017.M. J. Dousti, A. Petraglia, and M. Pedram,

Maximum Power Point Tracking for Thermoelectric Generators using Their Accurate Electrothermal Model,

to appear in*Advances in Energy Research,*Vol. 26, Nova Science Publishers, 2017.H. Goudarzi and M. Pedram.

Achieving Energy Efficiency in Datacenters by Virtual Machine Sizing, Replication, and Placement,

in Elsevier’s book titled*Advances in Computers: Energy Efficiency in Data Centers and Clouds*, Editors: A. Hurson and H. Sarbazi-Azad, Vol. 100, Feb. 2016.A. Shafaei, M-J. Dousti, M. Pedram.

Computer-Aided Design for Next-generation Quantum Computing Systems,

in*New Developments in Quantum Optics Research*, N. Stewart, Ed., Nova Science Publishers, 2015.N. Chang, M. Pedram, H. Lee, Y. Wang, and Y. Kim.

Reconfigurable Photovoltaic Array Systems for Adaptive and Fault-Tolerant Energy Harvesting,

in*Nano Devices and Circuit Techniques for Low-Energy Applications and Energy Harvesting*, Editor: C.M. Kyung, KAIST Research Series, Springer, Jul. 2015.Y. Wang, X. Lin, and M. Pedram.

Accurate component model based control algorithm for residential photovoltaic and energy storage systems accounting for prediction inaccuracies,

*Smart Grids: Technologies, Applications and Management Systems*, Nova Publishers, 2014.H. Goudarzi and M. Pedram.

Profit-maximizing resource allocation for multi-tier cloud computing systems under service level agreements,

*Large Scale Network-Centric Computing Systems*, Editors: H. Sarbazi-Azad and A. Zomaya, Wiley Series on Parallel and Distributed Computing, Oct. 2013.P. Rong and M. Pedram.

A stochastic framework for hierarchical system-level power management,

*Energy Efficient Distributed Computing Systems*, Wiley-IEEE Computer Society Press, edited by A. Zomaya and Y-C. Lee, Aug. 2012.N. Mohyuddin, E. Pakbaznia, and M. Pedram.

Probabilistic error propagation in a logic circuit using the Boolean difference calculus,

*Recent Advances in Logic Synthesis*, Ch. 19, Springer, edited by S.P. Khatri and K. Gulati, 2011.A. Iranli and M. Pedram.

System-level power management: An overview,

In*The VLSI Handbook Second Edition*, Edited by W-K. Chen, Taylor and Francis, 2006.A. Abdollahi and M. Pedram.

Power minimization techniques at the RT-level and below,

In*SoC: Next Generation Electronics*, Edited by Bashir M. Al-Hashimi, IEE Press, 2005.M. Maleki and M. Pedram.

Power-aware on-demand routing protocols for mobile ad hoc networks,

In*Low Power Electronics Design*, Edited by C. Piguet. The CRC Press, 2004.W-C. Cheng and M. Pedram.

Transmittance scaling for reducing power dissipation of a backlit TFT-LCD,

In*Ultra Low Power Design*, Edited by E. Macii. Kluwer Academic Publishers, 2004.M. Pedram.

Power simulation and estimation in VLSI circuits,

In*The VLSI Handbook*, Edited by W-K. Chen. The CRC Press and the IEEE Press, 1999.M. Pedram.

Advanced power estimation techniques,

In*Low Power Design in Deep Submicron Technology*, Edited by J. Mermet and W. Nebel. Kluwer Academic Publishers, 1997.S. Iman and M. Pedram.

Combinational circuit optimization,

In*Low Power Design in Deep Submicron Technology*, Edited by J. Mermet and W. Nebel. Kluwer Academic Publishers, 1997.M. Pedram.

Design technologies for low power VLSI,

In*Encyclopedia of Computer Science and Technology*, Vol. 36, Marcel Dekker, Inc., 1997, pp. 73-96.S. B. K. Vrudhula, M. Pedram and Y. T. Lai,

Edge-valued binary-decision diagrams,

In*Representations of discrete functions*, Edited by T. Sasao and M. Fujita. Kluwer Academic Publishers, 1996, pp. 109-132.

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M Soltani, M Kamal, A Afzali-Kusha, and M Pedram. "An Adaptive Memory Side Encryption Method for Improving Security and Lifetime of PCM-based Main Memory,"

*IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems*, Early Access Article, 2021.S. Vahdat, M. Kamal, A. Afzali-Kusha, and M. Pedram. “LATIM: Loading-Aware Offline Training Method for Inverter-based Memristive Neural Networks,”

*IEEE Trans. on Circuits and Systems II: Express Briefs*, Early Access Article, 2021.B. Zhang, Z. Cheng, and M. Pedram. “High-Radix Design of a Scalable Montgomery Modular Multiplier with Low Latency,”

*IEEE Trans. on Computers*, Early Access Article, 2021.M. J. Dousti, Q. Xie, M. Nazemi, and M. Pedram, “Therminator 2: A Fast Thermal Simulator for Portable Devices,”

*IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems*, Early Access Article, 2021.S. Vahdat, M. Kamal, A. Afzali-Kusha, and M. Pedram. “Loading-Aware Reliability Improvement of Ultra-Low Power Memristive Neural Networks,”

*IEEE Trans. Circuits Syst. I Regular Papers*68(8): 3411-3421 (2021).R. Yarmand, M. Kamal, A. Afzali-Kusha, P. Esmaeli and M. Pedram, "OPTIMA: An Approach for Online Management of Cache Approximation Levels in Approximate Processing Systems"

*IEEE Trans. on Very Large Scale Integration Systems*, 29(2): 434-446 (2021).K. Han, S. Lee, K-I. Oh, Y. Bae, H. Jang, J-J. Lee, W. Lee, and M. Pedram. “Developing TEI-aware Ultra Low Power SoC Platforms for IoT Endnodes,”

*IEEE Internet of Things Journal*, 8(6): 4642-4656 (2021).A. E. Eshratifar, M. S. Abrishami, and M. Pedram. “JointDNN: An Efficient Training and Inference Engine for Intelligent Mobile Cloud Computing Services,”

*IEEE Trans. on Mobile Computing*, 20(2): 565-576 (2021).S. Amanollahi, M. Kamal, A. Afzali-Kusha and M. Pedram, "Circuit-Level Techniques for Logic and Memory Blocks in Approximate Computing Systems,"

*Proceedings of the IEEE*, vol. 108, no. 12, pp. 2150-2177, Dec. 2020.S. Vahdat, M. Kamal, A. Afzali-Kusha and M. Pedram, "Offline Training Improvement of Inverter-Based Memristive Neural Networks Using Inverter Voltage Characteristic Smoothing,"

*IEEE Trans. on Circuits and Systems II: Express Briefs*, vol. 67, no. 12, pp. 3442-3446, Dec. 2020.N. Katam, H. Zha, M. Pedram, and M. Annavaram. “Multi Fluxon Storage and its Implications for Microprocessor Design,”

*Journal of Physics: Conference Series*, 1559 (1), 012004.T. Lin, B. Zhang, and M. Pedram. “Post-Routing Optimization for Working Frequency of Single Flux Quantum Circuits,”

*IEEE Trans. on Applied Superconductivity*, vol. 30, no. 7, Oct. 2020, pp. 1-14.B. Zhang, M. Li, and M. Pedram. “qSSTA: a Statistical Static Timing Analysis Tool for Superconducting Single-Flux-Quantum Circuits,”

*IEEE Trans. on Applied Superconductivity*, vol. 30, no. 7, Oct. 2020, pp. 1-12.O. Akbari, M. Kamal, A. Afzali-Kusha, M. Pedram, and M. Shafique. “X-CGRA: An Energy-Efficient Approximate Coarse-Grained Reconfigurable Architecture,”

*IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems*, vol. 39, no. 10, Oct. 2020, pp. 2558-2571.P. Haghi, M. Kamal, A. Afzali-Kusha, and M. Pedram. “O4-DNN: A Hybrid DSP-LUT-Based Processing Unit with Operation Packing and Out-of-Order Execution for Efficient Realization of Convolutional Neural Networks on FPGA Devices,”

*IEEE Trans. on Circuits and Systems I: Regular Papers*, vol. 67, no. 9, Sept. 2020, pp. 3056-3069.S. Vahdat, M. Kamal, A. Afzali-Kusha, and M. Pedram. “INTERSTICE: Inverter-Based Memristive Neural Networks Discretization for Function Approximation Applications,”

*IEEE Trans. on Very Large Scale Integration (VLSI) Systems*, 28(7): 1578-1588 (2020).S. Kundu, M. Nazemi, M. Pedram, K. M. Chugg, and P. A. Beerel. "Pre-Defined Sparsity for Low-Complexity Convolutional Neural Networks,"

*IEEE Trans. on Computers*, 69(7): 1045-1058.B. Zhang and M. Pedram. “qSTA: A Static Timing Analysis Tool for Superconducting Single-Flux-Quantum Circuits,”

*IEEE Trans. on Applied Superconductivity<\i>, 30(5): 1-9 (2020).*H. Afzali-Kusha, M. Vaeztourshizi, M. Kamal, and M. Pedram. “Design Exploration of Energy-Efficient Accuracy-Configurable Dadda Multipliers With Improved Lifetime Based on Voltage Overscaling,”

*IEEE Trans. on Very Large Scale Integration (VLSI) Systems*, 28(5): 1207-1220 (2020).G. Pasandi and M. Pedram. “An Efficient Pipelined Architecture for Superconducting Single Flux Quantum Logic Circuits Utilizing Dual Clocks,”

*IEEE Trans. on Applied Superconductivity*, 30(2): 1-12 (2020).R. N. Tadros, A. Fayyazi. M. Pedram, and P. A. Beerel. “SystemVerilog Modeling of SFQ and AQFP Circuts,”

*IEEE Trans. on Applied Superconductivity*, 30(2): 1-13 (2020).M. Pedram and L. Wang.

Energy Efficiency in 5G Cellular Network Systems,

*IEEE Design & Test*, 37(1): 64-78 (2020).F. Ebrahimi-Azandaryani, O. Akbari, M. Kamal, A. Afzali-Kusha, and M. Pedram. “Block-based Carry Speculative Approximate Adder for Energy-Efficient Applications,”

*IEEE Trans. on Circuits and Systems II: Express Briefs*, 67-II(1): 137-141 (2020).N. Samimi, M. Kamal, A. Afzalli-Kusha, and M. Pedram. “Res-DNN: A Residue Number System based DNN Accelerator Unit,”

*IEEE Trans. on Circuits and Systems—I*, 67-I(2): 658-671 (2020).E. Bank-Tavakoli, S. A. Ghasemzadeh, M. Kamal, A. Afzali-Kusha, and M. Pedram. “POLAR: A Pipelined/Overlapped FPGA-based LSTM Accelerator,”

*IEEE Trans. on Very Large Scale Integration (VLSI) Systems*, 28(3): 838-842 (2020).M. Soltani, M. Kamal, A. Afzali-Kusha, and M. Pedram. “RandShift: An Energy-Efficient Fault-Tolerant Method in Secure Non-Volatile Main Memory,”

*IEEE Trans. on Very Large Scale Integration (VLSI) Systems*, 28(1): 287-291 (2020).R. Yarmand, M. Kamal, A. Afzali-Kusha, and M. Pedram. “DART: A Framework for Determining Approximation Levels in an Approximable Memory Hierarchy,”

*IEEE Trans. on Very Large Scale Integration (VLSI) Systems*, 28(1): 273-286 (2020).T. Lin, Y. Li, M. Pedram, and L. Chen. “Design Space Exploration of Memory Controller Placement in Throughput Processors with Deep Learning,”

*Computer Architecture Letters*18(1): 51-54 (2019).G. Pasandi , R. Mehta, M. Pedram, and S. Nazarian.

Hybrid Cell Assignment and Sizing for Power, Area, Delay Product Optimization of SRAM Arrays,

*IEEE Trans. on Circuits and Systems II: Express Briefs*, vol. 66, no. 12, Dec. 2019, pp. 2047-2051.G. Pasandi, K. Mehrabi, B. Ebrahimi, S. M. Fakhraei, A. Afzali-Kusha, and M. Pedram. “Low-power data encoding/decoding for energy-efficient static random access memory design,”

*IET Circuits, Devices & Systems*, vol. 13, no. 8, Dec. 2019, pp. 1152-1159.M. Ansari, A. Fayyazi, M. Kamal, A. Afzali-Kusha, and M. Pedram. “OCTAN: An On-Chip Training Algorithm for Memristive Neuromorphic Circuits,”

*IEEE Trans. on Circuits and Systems--I*, vol. 66, no. 12, Dec. 2019, pp. 4687-4698.S. Nazar Shahsavani and M. Pedram. “A Minimum-Skew Clock Tree Synthesis Algorithm for Single Flux Quantum Logic Circuits,”

*IEEE Trans. on Applied Superconductivity*, vol. 29, no. 8, Dec. 2019.A. Esmaili, M. Nazemi, and M. Pedram.

Energy-aware Scheduling of Task Graphs with Imprecise Computations and End-to-end Deadlines,

*ACM Trans. on Design Automation of Electronic System*, vol. 25, no. 1, Nov. 2019, Article No. 11.W. Lee, T. Kang, J.J. Lee, K. Han, J. Kim, and M. Pedram

TEI-ULP: Exploiting Body Biasing to Improve the TEI-Aware Ultra-Low Power Methods,

*IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems*, vol. 38, no. 9, Sep. 2019, pp. 1758-1770.S. Tabatabaei-Nikkhah, M. Zahedi, M. Kamal, A. Afzali-Kusha, and M. Pedram.

ACHILLES: Accuracy-Aware High-Level Synthesis Considering Online Quality Management,

*IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems*, vol. 38, no. 8, Aug. 2019, pp. 1452-1465.N. Katam and M. Pedram.

Timing Characterization for Static Timing Analysis of Single Flux Quantum Circuits,

*IEEE Trans. on Applied Superconductivity*, vol. 29, no. 6, Sep. 2019.L. Wang and M. Pedram. “QoS Guaranteed Online Management of Battery Swapping Station under Dynamic Energy Pricing,” IET Cyber-Physical Systems: Theory & Applications 4(3), Aug. 2019, pp. 259-264.

N. K. Katam, O.A. Mukhanov, and M. Pedram. “Simulation Analysis and Energy-Saving Techniques for ERSFQ Circuits,” IEEE Trans. on Applied Superconductivity, vol. 29, no. 5, Aug. 2019.

C. J. Fourie, K. Jackman, M. M. Botha, S. Razmkhah, P. Febvre, C. L. Ayala, Q. Xu, N. Yoshikawa, E. Patrick, M. Law, Y. Wang, M. Annavaram, P. A. Beerel, S. Gupta, S. Nazarian, and M. Pedram.

ColdFlux Superconducting EDA and TCAD Tools Project: Overview and Progress,

*IEEE Trans. on Applied Superconductivity*, vol. 29, no. 5, Aug. 2019.G. Pasandi and M. Pedram.

PBMap: A Path Balancing Technology Mapping Algorithm for Single Flux Quantum Logic Circuits,,

*IEEE Trans. on Applied Superconductivity*, vol. 29, no. 4, Jun. 2019.T.R. Lin, T. Edwards, and M. Pedram. “qGDR: A Via-Minimization-Oriented Routing Tool for Large-Scale Superconductive Single-Flux-Quantum Circuits,” IEEE Trans. on Applied Superconductivity, vol. 29, no. 7, Oct. 2019.

S. Vahdat, M. Kamal, A. Afzali-Kusha, and M. Pedram.

TOSAM: An Energy-Efficient Truncation- and Rounding-Based Scalable Approximate Multiplier,

to appear in*IEEE Trans. on Very Large Scale Integration (VLSI) Systems*, vol. 27, no. 5, May 2019, pp. 1161-1173.T.R. Lin, Y. Li, M. Pedram, and L. Chen, “Design Space Exploration of Memory Controller Placement in Throughput Processors with Deep Learning, “Computer Architecture Letters 18(1), Mar. 2019, pp. 51-54.

M. Pashaeefar, M. Kamal, A. Afzali-Kusha, and M. Pedram.

A Theoretical Framework for Quality Estimation and Optimization of DSP Applications Using Low-Power Approximate Adders,

*IEEE Trans. on Circuits and Systems I*, vol. 66, no. 1, Jan. 2019.O. Akbari, M. Kamal, M. Shafique, A. Afzali-Kusha, and M. Pedram.

Towards Approximate Computing for Coarse-Grained Reconfigurable Architectures,

*IEEE Micro*, vol. 38, no. 6, Nov.-Dec. 2018, pp. 63-72.M. Pashaeefar, M. Kamal, A. Afzali-Kusha, and M. Pedram.

Approximate Reverse Carry Propagate Adder for Energy-Efficient DSP Applications,

*IEEE Trans. on Very Large Scale Integration (VLSI) Systems*, vol. 26, no. 11, Nov. 2018, pp. 2530-2541.N. Katam and M. Pedram.

Logic Optimization, Complex Cell Design, and Retiming of Single Flux Quantum Circuits,

*IEEE Trans. on Applied Superconductivity*, vol. 28, no. 7, Oct. 2018.H. Afzali-Kusha, O. Akbari, M. Kamal, and M. Pedram.

Energy and Reliability Improvement of Voltage-Based, Clustered, Coarse-Grain Reconfigurable Arcitectures by Employing Quality-Aware Mapping

*IEEE Journal on Emerging and Selected Topics in Circuits and Systems*, vol. 8, no. 3, pp. 480-493, Sept. 2018.O. Akbari, M. Kamal, A. Afzali-Kusha, and M. Pedram.

RAP-CLA: A Reconfigurable Approximate Carry Look-Ahead Adder,

*IEEE Trans. on Circuits and Systems II: Express Briefs*, vol. 37, no. 8, Aug. 2018, pp. 1602-1613.G. Pasandi and M. Pedram,

Internal write-back and read-before-write schemes to eliminate the disturbance to the half-selected cells in SRAMs,

in*IET Circuits, Devices and Systems*, vol. 12, no. 4, Jul. 2018, pp. 460–466.A. Iranfar, M. Kamal, A. Afzali-Kusha, M. Pedram, and D. Atienza.

TheSPoT: Thermal Stress-Aware Power and Temperature Management for Multiprocessor Systems-on-Chip,

to appear in*Trans. on Computer-Aided Design of Integrated Circuits and Systems*, vol. 37, no. 8, Aug. 2018, pp. 1532-1545.M. Ansari, A. Fayyazi, A. Banagozar, M. A. Maleki, M. Kamal, A. Afzali-Kusha, and M. Pedram.

PHAX: Physical Characteristics Aware Ex-Situ Training Framework for Inverter-Based Memristive Neuromorphic Circuits,

*Trans. on Computer-Aided Design of Integrated Circuits and Systems*, vol. 37, no. 8, Aug. 2018, pp. 1602-1613.T. Cui, J. Li, Y. Wang, S. Nazarian, and M. Pedram.

An Exploration of Applying Gate-Length-Biasing Techniques to Deeply-Scaled FinFETs Operating in Multiple Voltage Regimes,

*IEEE Trans. on Emerging Topics in Computing*, vol. no. 2, Apr.-Jun. 2018, 172-183.A. Fayyazi, M. Ansari, M. Kamal, A. Afzali-Kusha, and M. Pedram.

An Ultra-Low-Power Memristive Neuromorphic Circuit for Internet of Things Smart Sensors,

*IEEE Internet of Things Journal*, vol. 5, no. 2, Apr. 2018, pp. 1011-1022.F. Nakhaee, M. Kamal, A. Afzali-Kusha, M. Pedram, S.M. Fakhraie, and H. Dorosti.

Lifetime Improvement by Exploiting Aggressive Voltage Scaling during Runtime of Error-Resilient Applications,

to appear in Elsevier's*Integration, the VLSI Journal*. Available on ScienceDirect since 9 Nov. 2017.N. Katam, O. Mukhanov, and M. Pedram.

Superconducting Magnetic Field Programmable Gate Array,

to appear in*IEEE Trans. on Applied Superconductivity*, vol. 28, no. 2, Mar. 2018, pp. 1-12.K. Han, W. Lee, JJ. Lee, J. Lee, and M. Pedram,

TEI-NoC: Optimizing Ultra-Low Power NoCs Exploiting the Temperature Effect Inversion,

to appear in*IEEE Trans. on Computer Aided Design*, vol. 37, no. 2, Feb. 2018, pp. 458-471.S. Abolmaali, M. Kamal, A. Afzali-Kusha, and M. Pedram.

An Efficient False Path-Aware Heuristic Critical Path Selection Method with High Process Space Coverage,

*ACM Trans. on Design Automation of Electronic Systems*, vol. 23, no. 3, Feb. 2018, pp. 32:1-32:25.I. Hwang and M. Pedram.

Hierarchical, Portfolio Theory-Based Virtual Machine Consolidation in a Compute Cloud,

*IEEE Trans. on Service Computing*, vol. 11, no. 1, Jan.-Feb. 2018, pp. 63-77.S. Vahdat, M. Kamal, A. Afzali-Kusha, and M. Pedram.

LETAM: A low energy truncation-based approximate multiplier,

Elsevier’s*Computers & Electrical Engineering*, Vol. 63, Oct. 2017, pp. 1-17.P. Zhao, X. Lin, S. Chen, Y. Wang, and M. Pedram.

A Hierarchical Resource Allocation and Consolidation Framework in a MultiCore Server Cluster Using a Markov Decision Process Model,

*IET Cyber-Physical Systems: Theory & Applications*, Vol. 2, No. 3, Oct. 2017, pp. 1-9.S. Abolmaali, N. Mansouri-Ghiasi, M. Kamal, A. Afzali-Kusha, and M. Pedram.

Efficient Critical Path Identification Based on Viability Analysis Method Considering Process Variations,,

*IEEE Trans. on VLSI Systems*, Vol. 29, No. 9, Sept. 2017, pp. 2668-2672.J. Li, X. Lin, S. Nazarian, and M. Pedram.

CTS2M: concurrent task scheduling and storage management for residential energy consumers under dynamic energy pricing,

*IET Cyber-Physical Systems: Theory & Applications*, Vol. 2, No. 3, Sept. 2017, pp. 1-7.T. Cui, S. Chen, Y. Wang, S. Nazarian, and M. Pedram.

Optimal Control of PEVs with a Charging Aggregator Considering Regulation Service Provisioning,

*IEEE Trans. on Cyber-Physical Systems,*Vol. 1, Issue 4, Aug. 2017, Article No. 23.T. Cui, S. Chen, Y. Wang, Q. Zhu, S. Nazarian, and M. Pedram.

An Optimal Energy Co-Scheduling Framework for Smart Buildings,

Elsevier’s*Integration, the VLSI Journal*Vol. 58, Jun. 2017, pp. 528-537.S. Nazar Shahsavani, T-R. Lin, A. Shafaei, C.J. Fourie, and M. Pedram.

An Integrated Row-Based Cell Placement and Interconnect Synthesis Tool for Large SFQ Logic Circuits,

*IEEE Trans. on Applied Superconductivity*, Vol. 27, No. 4, Apr. 2017, pp. 1-8.W. Lee, K. Han, Y. Wang, T. Cui, S. Nazarian, and M. Pedram.

TEI-power: Temperature Effect Inversion Aware Dynamic Thermal Management,

*ACM Trans. on Design Automation of Electronic Systems*, Vol. 22, No. 3, Apr. 2017, Article No. 51.O. Akbari, M. Kamal, A. Afzali-Kusha, and M. Pedram.

Dual-quality 4:2 compressors for utilizing in dynamic accuracy configurable multipliers,

*IEEE Trans. on VLSI Systems*, Vol. 25, No. 4, Apr. 2017, pp. 1352-1361.M. Hemmat, M. Kamal, A. Afzali-Kusha, and M. Pedram.

Hybrid TFET-MOSFET Circuit: A Solution to Design Soft-Error Resilient Ultra-Low Power Digital Circuit,

*Integration, the VLSI Journal*, Vol. 57, Mar. 2017, pp. 11–19.D. Zhu, S. Yue, M. Pedram, and L. Chen.

CALM: Contention-Aware Latency-Minimal Application Mapping for Flattened Butterfly On-Chip Networks,

*ACM Trans. on Design Automation of Electronic Systems*, Vol. 22, Issue 2, Mar. 2017, Article No. 21.M. Bahadori, M. Kamal, A. Afzali-Kusha, and M. Pedram.

An Energy and Area Efficient yet High-Speed Square-Root Carry Select Adder Structure,

Elsevier’s*Computers & Electrical Engineering, An International Journal*, Vol. 58, Feb, 2017, pp. 101-112.R. Zendegani, M. Kamal, M. Bahadori, A. Afzali-Kusha, and M. Pedram.

RoBA Multiplier: A Rounding-Based Approximate Multiplier for High-Speed yet Energy-Efficient Digital Signal Processing,

*IEEE Trans. on VLSI Systems*, Vol. 25, No. 2, Feb. 2017, pp. 393-401.Y. Wang and M. Pedram.

Model-free reinforcement learning and Bayesian classification in system-level power management,

*IEEE Trans. on Computers*, Vol. 65, No. 12, Dec. 2016, pp. 3713-3726.X. Lin, Y. Wang, M. Pedram, and N. Chang.

Concurrent Task Scheduling and Dynamic Voltage and Frequency Scaling in a Real-Time Embedded System with Energy Harvesting,

*IEEE Trans. on Computer Aided Design*, Vol. 35, No. 11, Nov. 2016, pp. 1890-1902.D. Zhu, L. Chen, S. Yue, T.M. Pinkston, and M. Pedram.

Providing Balanced Mapping for Multiple Applications in Many-Core Chip Multiprocessors,

*IEEE Trans. on Computers*, Vol. 65, No. 10, Oct. 2016, pp. 3122-3135.M. Hemmat, M. Kamal, A. Afzali-Kusha, and M. Pedram.

Study on the impact of device parameter variations on performance of III-V homojunction and heterojunction tunnel FETs,

Elsevier’s*Solid-State Electronics*, Vol. 124, Oct. 2016, pp. 46-53.L. Chen, D. Zhu, M. Pedram, and T. M. Pinkston.

Simulation of NoC Power-Gating: Requirements, Optimizations, and the Agate Simulator,

Special issue on Energy Efficient Multi-Core and Many-Core Systems (Part I) of the*Journal of Parallel and Distributed Computing*, Vol. 95, Sep. 2016, pp. 69-78.H. Ahmadi Balef, M. Kamal, A. Afzali-Kusha, and M. Pedram.

All-Region Statistical Model for Delay Variation based on Log-Skew-Normal Distribution,

*IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems*, Vol. 35, No. 9, Sep. 2016, pp. 1503-1508.D. Zhu, S. Yue, N. Chang, and M. Pedram.

Towards a Profitable Grid-Connected Hybrid Electrical Energy Storage System for Residential Use,

*IEEE Trans. on Computer Aided Design of Circuits and Systems*, Vol. 35, No. 7, Jul. 2016, pp. 1151-1164.I. Hwang and M. Pedram.

A Comparative Study of the Effectiveness of CPU Consolidation versus Dynamic Voltage and Frequency Scaling in a Virtualized Multi-Core Server,

*IEEE Trans. on VLSI Systems,*, Vol. 24, No. 6, Jun. 2016, pp. 2103-2116.M. Pedram and A. Shafaei.

Layout Optimization for Quantum Circuits with Linear Nearest Neighbor Architectures,

*IEEE Circuits and Systems Magazine*, Vol. 16, No. 2, May 2016, pp. 62-74.H. Goudarzi and M. Pedram.

Hierarchical SLA-Driven Resource Management for Peak Power-Aware and Energy-Efficient Operation of a Cloud Datacenter,

*IEEE Trans. on Cloud Computing*, Vol. 4, No. 2, Apr.-Jun. 2016, pp. 222-236.Q. Xie, D. Shin, N. Chang, and M. Pedram.

Joint Charge and Thermal Management for Batteries in Portable Systems with Hybrid Power Sources,

*IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems*, Vol. 35, No. 4, Apr. 2016, pp. 611-622.M.J. Dousti, A. Shafaei, and M. Pedram.

Squash 2: A Hierarchical Scalable Quantum Mapper Considering Ancilla Sharing,

*Quantum Information and Computation Journal*, Rinton Press, Vol.16, No.3&4, Mar. 2016, pp. 332-356.M. Bahadori, M. Kamal, A. Afzali-Kusha, and M. Pedram.

A Comparative Study on Performance and Reliability of 32-bit Binary Adders,

*Integration, the VLSI Journal*, Vol. 53, Mar. 2016, pp. 54–67.M. Kamal, Q. Xie, M. Pedram, A. Afzali-Kusha, and S. Safari.

An Efficient Temperature Dependent Hot Carrier Injection Reliability Simulation Flow,

*Elsevier Microelectronics Reliability*, Vol. 57, Feb. 2016, pp. 10-19.M. Bahadori, M. Kamal, A. Afzali-Kusha, M. Pedram.

High-Speed and Energy-Efficient Carry Skip Adder Operating under a Wide Range of Supply Voltage Levels,

*IEEE Trans. on VLSI Systems*, Vol. 24, No. 2, Feb. 2016, pp. 421-433.M. Kamal, A. Afzali-Kusha, S. Safari, and M. Pedram.

Yield and Speedup Improvements in Extensible Processors by Allocating Extra Cycles to Some Custom Instructions,

*ACM Trans. on Design Automation of Electronic Systems*, Vol. 21, No. 2, Jan. 2016, pp. 28:1-28:25.T. Cui, Y. Wang, S. Nazarian, and M. Pedram.

Profit maximization algorithms for utility companies in an oligopolistic energy market with dynamic prices and intelligent users,

*AIMS Energy*41(1):22-38, Jan. 2016.Y. Wang, X. Lin, and M. Pedram.

A Near-Optimal Model-Based Control Algorithm for Households Equipped with Residential Photovoltaic Power Generation and Energy Storage Systems,

*IEEE Trans. on Sustainable Energy*, Vol. 7, No. 1, Jan. 2016, pp. 77-86.B. Ebrahimi, R. Asadpour, A. Afzali-Kusha, and M. Pedram.

A FinFET SRAM cell design with BTI robustness at high supply voltages and high yield at low supply voltages,

*International Journal of Circuit Theory and Applications*, Vol. 43, No. 12, Dec. 2015, pp. 2011-2024.M. Kamal, A. Afzali-Kusha, S. Safari, and M. Pedram.

OPLE: A Heuristic Custom Instruction Selection Algorithm Based on Partitioning and Local Exploration of Application Data Flow Graphs,

*ACM Trans. on Embedded Computing Systems*, Vol. 14, Issue 4, Sep. 2015, pp. 72:1-72:23.A. Shafaei, S. Chen, Y. Wang, and M. Pedram.

A Cross-layer Framework for Designing and Optimizing Deeply-scaled FinFET-based Cache Memories,

*MDPI’s Open-Access Journal of Low Power Electronics and Applications*, Vol. 5, Issue 3, Aug. 2015, pp. 165-182.Q. Xie, X. Lin, Y. Wang, S. Chen, M.J. Dousti, and M. Pedram.

Performance Comparisons between 7nm FinFET and Conventional Bulk CMOS Standard Cell Libraries,

*IEEE Trans. on Circuits and Systems II*, Vol. 62, No. 8, Aug. 2015, pp. 761-765.V. Akhlaghi, M. Kamal, A. Afzali-Kusha, and M. Pedram.

An Efficient Network on-Chip Architecture Based on Isolating Local and non-Local Communications,

*Elsevier Computers & Electrical Engineering*, Vol. 45, Jul. 2015, pp. 430–444.B. Eghbalkhaha, M. Kamala, H. Afzali-Kusha, A. Afzali-Kushaa, M.B. Ghaznavi-Ghoushchic, and M. Pedram.

Workload and Temperature Dependent Evaluation of BTI-Induced Lifetime Degradation in Digital Circuits,

*Elsevier Microelectronics Reliability Journal*, Vol. 55, Issue 8, Jul. 2015, pp. 1152-1162.W. Lee, Y. Wang, and M. Pedram.

Optimizing a Reconfigurable Power Distribution Network in a Multicore Platform,

*IEEE Trans. on Computer Aided Design*, Vol. 34, No. 7, Jul. 2015, pp. 1110-1123.B. Ebrahimi, M. Ansari, H. Afzali-Kusha, Z. Navabi, A. Afzali-Kusha, and M. Pedram.

A Near-Threshold 7T SRAM Cell with High Write and Read Margins and Low Write Time for Sub-20 nm FinFET Technologies,

*Elsevier Integration, the VLSI Journal*, Vol. 50, Jun. 2015, pp. 91–106.X. Lin, Y. Wang, Q. Xie, and M. Pedram.

Task Scheduling with Dynamic Voltage and Frequency Scaling for Energy Minimization in the Mobile Cloud Computing Environment,

*IEEE Trans. on Services Computing*, Vol. 8, No. 2, March-April 2015, pp. 175-186.M. Kamal, A. Afzali-Kusha, and M. Pedram.

Design of NBTI-Resilient Extensible Processors,

*Elsevier Journal of Integration,*Vol. 49, Mar. 2015, pages 22-34.H.R. Ahmadi, A. Afzali-Kusha, M. Pedram, and M. Mosaffa,

Flexible, Prime-Field, Genus 2 Hyperelliptic-Curve Cryptography Processor with Low Power Consumption and Uniform Power Draw,

*ETRI Journal*, Vol. 37, No. 1, Feb. 2015, pp. 107-117.B. Eghbalkhah, M. Kamal, A. Afzali-Kusha, M.B. Ghaznavi-Ghoushchi, and M. Pedram.

CSAM: A Clock Skew-aware Aging Mitigation Technique,

to appear in*Elsevier Microelectronics Reliability Journal*, Vol. 55, No. 1, Jan. 2015, pp. 282-290.M. Triki, Y. Wang, A.C. Ammari, and M. Pedram.

Hierarchical Power Management of a System with Autonomously Power-Managed Components Using Reinforcement Learning,

*Elsevier Integration, the VLSI Journal*, Vol. 48, No. 1, Jan. 2015, pages 10-20.Y. Wang, X. Lin, and M. Pedram.

A Stackelberg Game-Based Optimization Framework of the Smart Grid with Distributed PV Power Generations and Data Centers,

*IEEE Trans. on Energy Conversion*, Vo. 29, No. 4, Dec. 2014, pages 978-987.Y. Wang, X. Lin, Y. Kim, Q. Xie, M. Pedram. and N. Chang.

Single-source, single-destination charge migration in hybrid electrical energy storage systems,

*IEEE Trans. on VLSI Systems*, Vol. 22, No. 12, Dec. 2014, pages 2752-2765.A. Shafaei, M. Saeedi, and M. Pedram.

Cofactor Sharing for Reversible Logic Synthesis,

*ACM JETC Special Issue on Reversible Computation*, Special Issue on Reversible Computation, Vol. 11, No. 2, Nov. 2014, pages 14:1-14:21.Q. Xie, Y. Kim, Y. Wang, J. Kim, N. Chang, and M. Pedram.

Principles and Efficient Implementation of Charge Replacement in Hybrid Electrical Energy Storage Systems,

*IEEE Trans. on Power Electronics*, Vol. 29, No. 11, Nov. 2014, pages 6110-6123.A. Yazdanbakhsh, M. Kamal, S.M. Fakhraie, A. Afzali-Kusha, S. Safari, and M. Pedram.

Implementation-Aware Selection of the Custom Instruction Set for Extensible Processors,

*Elsevier Microprocessors and Microsystems*, Vol. 38, No. 7, Oct. 2014, pages 681–691.Q. Xie, Y. Wang, M. Pedram.

Designing Soft-Edge Flip-Flop-Based Linear Pipelines Operating in Multiple Supply Voltage Regimes,

*Elsevier Integration, the VLSI Journal*, Vol. 47, No. 3, Jun. 2014, pages 318–328.X. Lin, Y. Wang, M. Pedram. J. Kim, and N. Chang.

Designing Fault-Tolerant Photovoltaic Systems,

*IEEE Design and Test Magazine*, Vol. 31, No. 3, Jun. 2014, pp. 1–9.Y. Wang, X. Lin, Y. Kim, N. Chang, and M. Pedram.

Architecture and control algorithms for combating partial shading in PV systems,

*IEEE Trans. on Computer Aided Design*, Vo. 33, No. 6, Jun. 2014, pp. 917–930.Y. Kim, J. Koh, Q. Xie, Y. Wang, N. Chang, and M. Pedram.

A scalable and flexible hybrid energy storage system design and implementation,

*Journal of Power Sources*, Vol. 255, No. 1 Jun. 2014, pp. 410-422.M. Kamal, A. Afzali-Kusha, S. Safari, and M. Pedram.

Impact of Process Variations on Speedup and Maximum Achievable Frequency of Extensible Processors,

*ACM Journal on Emerging Technologies in Computing Systems*, Vol. 10, No. 3, Apr. 2014, Article No. 19.S. Hatami, M. Helaoui, F. M. Ghannouchi, and M. Pedram.

Single-Bit Pseudoparallel Processing Low-Oversampling Delta-Sigma Modulator Suitable for SDR Wireless Transmitters"

*IEEE Trans. on VLSI Systems*, Vol. 22, No. 4, Apr. 2014, pp. 922-931.Y. Wang, X. Lin, and M. Pedram.

Adaptive control for energy storage systems in households with photovoltaic modules,

*IEEE Trans. on Smart Grid*, Vol. 5, No. 2, Mar. 2014, pp. 992-1001.H. Goudarzi, M.J. Dousti, A. Shafaei Bejestan, and M. Pedram.

Design of a Universal Logic Block for Fault-Tolerant Realization of any Logic Operation in Trapped-Ion Quantum Circuits,

*Springer Journal of Quantum Information Processing*, Vol. 13, Jan. 2014, pp. 1267-1299.W. Lee, Y. Wang, D. Shin, N. Chang, and M. Pedram.

Optimizing the Power Delivery Network in a Smartphone Platform,

*IEEE Trans. on Computer Aided Design*, Vol. 33, No. 1, Jan. 2014, pp. 36-49.Y. Kim, Y. Wang, M. Pedram. and N. Chang,

Computer-Aided Design and Optimization of Hybrid Energy Storage Systems,

Now's*Foundations and Trends in Electronic Design Automation*, Vol. 7, No. 4, 2013, pp. 247-338.M. Kamal, A. Afzali-Kusha, S. Safari, and M. Pedram.

Considering the effect of process variations during the ISA extension design flow,

*Elsevier Microprocessors and Microsystems*, Vol. 37, No. 6-7, Aug.-Oct. 2013, pp. 713-724.K. Patel, M. Annavaram, and M. Pedram.

NFRA: Generalized Network Flow Based Resource Allocation for Hosting Centers,

*IEEE Trans. on Computers*, Vol. 62, No. 9, Sep. 2013, pp. 1772-1785.M. Kamal, A. Yazdanbakhsh, H. Noori, A. Afzali-Kusha, and M. Pedram.

A new merit function for custom instruction selection under an area budget constraint,

*Springer Design Automation for Embedded Systems*, Vol. 17, Sep. 2013, pages 1-25.D. Shin, Y. Kim, N. Chang, and M. Pedram.

Dynamic Driver Supply Voltage Scaling for Organic Light Emitting Diode Displays,

*IEEE Trans. on Computer Aided Design*, Vol. 32, No. 7, Jul. 2013, pp. 1017-1030.Q. Xie, Y. Wang, Y. Kim, N. Chang, and M. Pedram.

Charge allocation for hybrid electrical energy storage systems,

*IEEE Trans. on Computer Aided Design*, Vol. 32, No. 7, Jul. 2013, pp. 1003-1016.M. Saeedi and M. Pedram.

Linear-Depth Quantum Circuits for n-qubit Toffoli gates with no Ancilla,

*Physical Review A*, Vol. 87, No. 6, 2013 (arXiv:1303.3557).A. Abdollahi, M. Saeedi, and M. Pedram.

Reversible Logic Synthesis by Quantum Rotation Gates,

*Quantum Information and Computation Journal*, Rinton Press, Vol. 13, No. 9-10, pp. 0771-0792, 2013 (arXiv:1302.5382).H. Abrishami, S. Hatami, and M. Pedram.

Design and Multi-Corner Optimization of the Energy-Delay Product of CMOS Flip-Flops under the NBTI Effect,

*IEEE Trans. on Computer Aided Design*, Vol. 32, No. 6, Jun. 2013, pp. 869-881.S. Park, J. Park, D. Shin, Y. Wang, Q. Xie, N. Chang, and M. Pedram

Accurate Modeling of the Delay and Energy Overhead of Dynamic Voltage and Frequency Scaling in Modern Microprocessors,

*IEEE Trans. on Computer Aided Design*, Vol. 32, No. 5, May 2013, pp. 695-708.B. Ghavami, M. Raji, H. Pedram. and M. Pedram.

Statistical functional yield estimation and enhancement of CNFET-based VLSI circuits,

*IEEE Trans. on VLSI Systems*, > Vol. 21, No. 5, May 2013, pp. 887-900.Y. Kim, W. Lee, M. Pedram. and N. Chang.

Dual-mode power regulator for photovoltaic module emulation,

*Elsevier Applied Energy*, Vol. 101, Jan. 2013, pp. 730-739.B. Afzal, A. Afzali-Kusha, and M. Pedram.

Analytical Modeling of Read Margin Probability Distribution Function of SRAM Cells in Presence of Process Variations and Negative Bias Temperature Instability Effect,

*Japanese Journal of Applied Physics*, Vol. 51, No. 11, Nov. 2012.H. Aghababa, B. Ebrahimi, A. Afzali-Kusha, and M. Pedram.

Probability calculation of read failures in nano-scaled SRAM cells under process variations."

*Microelectronics Reliability*, Vol. 52, No. 11, Nov. 2012, pp. 2805-2811.M. Pedram.

Energy-Efficient Datacenters,

*IEEE Trans. on Computer Aided Design*, Vol. 31, No. 10, Oct. 2012, pp. 1465-1484.H. Aghababa, A. Khosropour, A. Afzali-Kusha, B. Forouzandeh, and M. Pedram.

Statistical estimation of leakage power dissipation in nano-scale complementary metal oxide semiconductor digital circuits using generalized extreme value distribution,

*IET Computers & Digital Techniques*, Vol. 6, No. 5, Sep. 2012, p. 271-373.D. Shin, Y. Kim, Y. Wang, N. Chang, and M. Pedram.

Constant-Current Regulator-Based Battery-Supercapacitor Hybrid Architecture for High-Rate Pulsed Load Applications,

*Elsevier Journal of Power Sources*, Vol. 205, May 2012, pp. 516-524.E. Pakbaznia and M. Pedram.

Design of a tri-modal multi-threshold CMOS Switch with application to data retentive power gating,

*IEEE Trans. on VLSI Systems*, Vol. 20, No. 2, Feb. 2012, pp. 380-385.B. Afzal, B. Ebrahimi, A. Afzali-Kusha, and M. Pedram.

An accurate analytical I-V model for sub-90-nm MOSFETs and its application to read SNM modeling,

*Springer Journal of Zhejiang University-SCIENCE C (Computers & Electronics)*, Vol. 13, No. 1, Jan. 2012, pp. 58-70.M. Ghasemazar and M. Pedram.

Optimizing the power-delay product of a linear pipeline by opportunistic time borrowing,

*IEEE Trans. on Computer Aided Design*, Vol. 30, No. 10, Oct. 2011, pp. 1493-1506.B. Ebrahimi, M. Rostami, A. Afzali-Kusha, and M. Pedram.

Statistical design optimization of FinFET SRAM using back-gate voltage,

*IEEE Trans. on VLSI Systems*, , Vol. 19, No. 10, Oct. 2011, pp. 1911-1916.M. E. Salehi, M. Samadi, M. Najibi, A. Afzali-Kusha, M. Pedram. and S. M. Fakhraie.

Dynamic voltage and frequency scheduling for embedded processors considering power/performance tradeoffs,

*IEEE Trans. on VLSI Systems*, Vol. 19, No. 10, Oct. 2011, pp. 1931-1935.S. Nazarian, H. Fatemi, and M. Pedram.

Accurate timing and noise analysis of combinational and sequential logic cells using current source modeling,

*IEEE Trans. on VLSI Systems*, Vol. 19, No. 1, Jan. 2011, pp. 92-103.H-R. Ahmadi, A. Afzali-Kusha, and M. Pedram.

A power-optimized secure low-energy elliptic-curve cryptography processor,

*IEICE Electronics Express*, Vol. 7, No. 23, 2010, pp.1752-1759.H-S. Jung and M. Pedram.

Supervised learning based power management for multicore processors,

*IEEE Trans. on Computer Aided Design*, Vol. 29, No. 9, Sep. 2010, pp. 1395-1408.P. Rong and M. Pedram.

A Markovian decision-based approach for extending the lifetime of a network of battery-powered mobile devices by remote processing,

*Int'l Journal of Low Power Electronics*, American Scientific Publishers, Vol. 6 No. 2, August 2010, pp. 227-239.E. Rokhsat, A. Afzali-Kusha, and M. Pedram.

A high-efficiency, auto mode-hop, variable-voltage, ripple control buck converter,

*Journal of Power Electronics*, Korean Institution of Power Electronics, Vol. 10, No. 2 Mar. 2010, pp. 115-124.G. Razavipour, A. Afzali-Kusha, and M. Pedram.

Design and analysis of two low-power SRAM cell structures,

*IEEE Trans. on VLSI Systems*, Vol. 17, No. 10, Oct. 2009, pp. 1551-1555.A. M. Rahmani, A. Afzali-Kusha, and M. Pedram.

Forecasting-based dynamic virtual channel management for power reduction in network-on-chips,

*Journal of Low Power Electronics*, Vol.5, No. 3, Oct. 2009, pp. 385-395A. M. Rahmani, A. Afzali-Kusha, and M. Pedram.

A novel synthetic traffic pattern for power/performance analysis of network-on-chips using negative exponential distribution,

*Journal of Low Power Electronics*, Vol.5, No. 3, Oct. 2009, pp. 396-405.H-S. Jung, A. Hwang, and M. Pedram.

Predictive-flow-queue based energy optimization for gigabit Ethernet controllers."

*IEEE Trans. on VLSI Systems*, Vol. 17, No. 8, Aug. 2009, pp. 1113-1126.H-S. Jung and M. Pedram.

Uncertainty-aware dynamic power management in partially observable domains,

*IEEE Trans. on VLSI Systems*, Vol. 17, No. 7, Jul. 2009, pp. 929-942.M. Saneei, A. Afzali-Kusha, Z. Navabi, and M. Pedram.

Two high performance and low power serial communication interfaces for on-chip interconnects,

*Canadian Journal of Electrical and Computer Engineering*, Vol. 34, No. 1/2, Winter/Spring 2009, pp. 49-56.B. Amelifard and M. Pedram.

Optimal design of the power delivery network for multiple voltage-island system-on-chips,

*IEEE Trans. on Computer Aided Design*, Vol. 28, No. 6, Jun. 2009, pp. 888-900.B. Amelifard, F. Fallah, and M. Pedram.

Low-power fanout optimization using multi threshold voltages and multi channel lengths,

*IEEE Trans. on Computer Aided Design*, , Vol. 28, No. 4, Apr. 2009, pp. 478-489.M. Mottaghi-Dastjerdi, A. Afzali-Kusha, and M. Pedram.

BZ-FAD: A low-power low-area multiplier based on shift-and-add architecture,

*IEEE Trans. on VLSI Systems*, Vol. 17, No.2, Feb. 2009, pp. 302-305.W-B. Lee, K. Patel, and M. Pedram.

White LED backlight control for motion blur reduction and power minimization in large LCD TV's,

*Journal of the Society for Information Display*, Vol. 17, No. 1, Jan. 2009, pp. 37-45.E. Pakbaznia, F. Fallah, and M. Pedram.

Charge recycling in power-gated CMOS circuits,

*IEEE Trans. on Computer Aided Design*, Vol. 27, No. 10, Oct. 2008, pp. 1798-1811.S. Nazarian and M. Pedram.

Crosstalk-affected delay analysis in nanometer technologies,

*Int'l Journal of Electronics*, Taylor & Francis Publishers, Vol. 95, No. 9, Sep. 2008, pp. 903-937.B. Amelifard, F. Fallah and M. Pedram.

Leakage minimization of SRAM cells in a dual-Vt and dual-Tox technology,

*IEEE Trans. on VLSI Systems*, Vol. 16, No.7, Jul. 2008, pp. 851-860.W-B. Lee, K. Patel, and M. Pedram.

GOP-level dynamic thermal management in MPEG-2 decoding,

*IEEE Trans. on VLSI Systems*, Vol. 16, No.6, Jun. 2008, pp. 662-672.A. Abdollahi and M. Pedram.

Symmetry detection and Boolean matching utilizing a signature-based canonical form of Boolean functions,

*IEEE Trans. on Computer Aided Design*, Vol. 27, No.6, Jun. 2008, pp. 1128-1137.P. Rong and M. Pedram.

Energy-aware task scheduling and dynamic voltage scaling in a real-time system,

*Int'l Journal of Low Power Electronics*, American Scientific Publishers, Vol. 4, No. 1, Apr. 2008, pp. 1-10.A. Abbasian, S. Hatami, A. Afzali-Kusha, and M. Pedram.

Wavelet-based dynamic power management for nonstationary service requests,

*ACM Trans. on Design Automation of Electronic Systems*, Vol. 13, No. 1, Jan. 2008, pp. 13:1-13:41.H. Parandeh-Afshar, M. Saneei, A. Afzali-Kusha, and M. Pedram.

Fast INC-XOR codec for low power address buses,

*IET Computers & Digital Techniques*, Vol. 1, No. 5, Sep. 2007, 625-626.C-W. Kang, A. Iranli, and M. Pedram.

A synthesis approach for coarse-grained, antifuse-based FPGAs."

*IEEE Trans. on Computer Aided Design*, Vol. 26, No. 9, Sep. 2007, pp. 1564-1575.S. Abbaspour, H. Fatemi, and M. Pedram.

Parameterized block-based non-Gaussian variational gate timing analysis,

*IEEE Trans. on Computer Aided Design*, Vol. 26, No. 8, Aug. 2007, pp. 1495-1508.A. Abdollahi, F. Fallah, and M. Pedram.

A robust power gating structure and power mode transition strategy for MTCMOS design,

*IEEE Trans. on VLSI Systems*, Vol. 15, No., 1, Jan. 2007, pp. 80-89.D. Hammerstrom, J. Harlow, I. Bahar, W. H. Joyner, C. Lau, D. Marculescu, A. Orailoglu, M. Pedram.

Architectures for Silicon nanoelectronics and beyond,

*IEEE Computer Magazine*, Jan. 2007, pp. 62-70.S. Abbaspour, M. Pedram. and A.H. Ajami,

Fast interconnect and gate timing analysis for performance optimization."

*IEEE Trans. on VLSI Systems*, Vol. 14, No. 12, Dec. 2006, pp. 1383-1388.A. Iranli and M. Pedram.

Cycle-based decomposition of Markov chains with applications to low power synthesis and sequence compaction for finite state machines."

*IEEE Trans. on Computer Aided Design*, Vol. 25, No. 12, Dec. 2006, pp. 2712-2725.A. Iranli, W-B. Lee, and M. Pedram.

HVS-Aware Dynamic Backlight Scaling in TFT LCD's."

*IEEE Trans. on VLSI systems*, Vol. 14, No. 10, Oct. 2006, pp. 1103-1116.M. Pedram and S. Nazarian,

Thermal modeling, analysis and management in VLSI circuits: principles and methods."

*Proc. of IEEE*, Special Issue on Thermal Analysis of ULSI, Vol. 94, No. 8, Aug. 2006, pp. 1487-1501.P. Rong and M. Pedram.

Battery-aware power management based on Markovian decision processes."

*IEEE Trans. on Computer Aided Design*, Vol. 25, No. 7, Jul. 2006, pp. 1337-1349.P. Rong and M. Pedram.

An analytical model for predicting the remaining battery capacity of Lithium-ion batteries."

*IEEE Trans. on VLSI systems*, Vol. 14, No. 5, May 2006, pp. 441-451.P. Heydari and M. Pedram.

Model-order reduction using variational balanced truncation with spectral shaping."

*IEEE Trans. on Circuits and Systems I*, Vol. 53, No. 4, Apr. 2006, pp. 879-891.**(Best Paper Award)**C-W. Kang and M. Pedram.

A leakage-aware low power technology mapping algorithm considering the hot-carrier effect."

*Int'l Journal of Low Power Electronics*, American Scientific Publishers, Vol. 1, No. 2, pp. 133-144, Aug. 2005.M. Pedram and A. Abdollahi,

Low power RT-level synthesis techniques: a tutorial."

*IEE Proc. on Computers and Digital Techniques*, Vol. 152, No. 3, pp. 333-343, May 2005.A. H. Ajami, K. Banerjee, and M. Pedram.

Modeling and analysis of non-uniform substrate temperature effects in high performance VLSI."

*IEEE Trans. on Computer Aided Design*, Vol. 24, No. 6, Jun. 2005, pp. 849-861.F. Fallah and M. Pedram.

Standby and active leakage current control and minimization in CMOS VLSI circuits."

*IEICE Trans. on Electronics, Special Section on Low-Power LSI and Low-Power IP*, Vol. E88-C, No. 4 Apr. 2005, pp. 509-519.K. Choi, W-C. Cheng, and M. Pedram

Frame-based dynamic voltage and frequency scaling for an MPEG player."

*Journal of Low Power Electronics*, American Scientific Publishers, Vol. 1, No. 1, Apr. 2005, pp. 27-43.K. Choi, K. Kim, and M. Pedram

Energy-aware MPEG-4 FGS streaming."

*Journal of Low Power Electronics*, American Scientific Publishers, Vol. 1, No. 1, Apr. 2005, pp. 44-51.A. Ajami, K. Banerjee, and M. Pedram.

Scaling analysis of on-chip power grid voltage variations in nanometer scale ULSI."

*Journal of Analog Integrated Circuits and Signal Processing*, Vol. 42, No. 3, Mar. 2005, pp. 277-290.P. Heydari and M. Pedram.

Capacitive crosstalk noise in high speed VLSI circuits."

*IEEE Trans. on Computer Aided Design*, Vol. 24, No. 3, Mar. 2005, pp.478-488.K. Choi, R. Soma, and M. Pedram.

Fine-grained dynamic voltage and frequency scaling for precise energy and performance trade-off based on the ratio of off-chip access to on-chip computation times."

*IEEE Trans. on Computer Aided Design*, Vol. 24, No. 1, Jan. 2005, pp.18-28.H. Shim, N. Chang, and M. Pedram.

A backlight power management framework for the battery-operated multi-media systems."

*IEEE Design and Test Magazine*, Sep./Oct. 2004, pp. 388-396.P. Heydari, S. Abbaspour and M. Pedram.

Interconnect energy dissipation in high-speed ULSI circuits."

*IEEE Trans. on Circuits and Systems I*, Vol. 51, No. 8, Aug. 2004, pp. 1501-1514.Y. Aghaghiri, F. Fallah, and M. Pedram.

Transition reduction in memory buses using sector-based encoding techniques."

*IEEE Trans. on Computer Aided Design*, Vol. 23, No. 8, Aug. 2004, pp. 1164-1174.W-C. Cheng and M. Pedram.

Chromatic encoding: a low power encoding technique for Digital Visual Interface."

*IEEE Trans. on Consumer Electronics*, Vol. 50, No. 1, Feb. 2004, pp. 320-328.W-C. Cheng and M. Pedram.

Power minimization in a backlit TFT-LCD display by concurrent brightness and contrast scaling."

*IEEE Trans. on Consumer Electronics*, Vol. 50, No. 1, Feb. 2004, pp. 25-32.A. Abdollahi, F. Fallah, and M. Pedram.

Leakage current reduction in CMOS VLSI circuits by input vector control."

*IEEE Trans. on VLSI Systems*, Vol. 12, No. 2, Feb. 2004, pp.140-154.P. Rezvani and M. Pedram.

A fanout optimization algorithm based on the effort delay model."

*IEEE Trans. on Computer Aided Design*, Vol. 22, No. 12, Dec. 2003, pp. 1671-1677.P. Heydari and M. Pedram.

Ground bounce in digital VLSI circuits,

*IEEE Trans. on VLSI Systems*, Vol. 11, No. 2, Apr. 2003, pp. 180-193.M. Pedram and Q. Wu.

Design considerations for battery-powered electronics,

*IEEE Trans. on VLSI Systems*, Vol. 10, No. 5, Oct. 2002, pp. 601-607.Y. Aghaghiri, F. Fallah and M. Pedram.

A class of irredundant encoding techniques for reducing bus power,

Special Issue on Low Power Design in*Journal of Circuits, Systems, and Computers*, World Scientific Publishers, Vol. 11, No. 5 (2002) pp. 445-457.W-C. Cheng and M. Pedram.

Power-aware bus encoding techniques for I/O and data busses in an embedded system,

Special Issue on Power IC Design in*Journal of Circuits, Systems, and Computers*, World Scientific Publishers, Vol. 11, No. 4 (2002), pp. 351-363.X. Wu, G. Hang and M. Pedram.

Low power DCVSL circuits employing AC power supply,

*Science in China*, Vol. 45, No. 3 (2002), pp. 232-242.W-C. Cheng and M. Pedram.

Power-optimal encoding for a DRAM address bus,

*IEEE Trans. on VLSI Systems*, Vol. 10, No. 2, Apr. 2002, pp. 109-118.A. Salek, J. Lou and M. Pedram.

Hierarchical buffered routing tree generation,

*IEEE Trans. on Computer Aided Design*, Vol. 21, No. 5, May 2002, pp. 554-567.C-T. Hsieh and M. Pedram.

Architectural power optimization by bus splitting,

*IEEE Trans. on Computer Aided Design*, Vol. 21, No. 4, Apr. 2002, pp. 408-414.X. Wu, B. Chen and M. Pedram.

Power estimation in CMOS circuits based on multiple-valued logic,

*Journal of Multiple Valued Logic*, Gordon and Breach Publishing Group, Vol.7, No. 3-4 (2001), pp. 195-211.Q. Qiu, Q. Wu and M. Pedram.

Stochastic modeling of a power-managed system: construction and optimization,

*IEEE Trans. on Computer Aided Design*, Vol. 20, No. 10, Oct. 2001, pp. 1200-1217.Q. Wu, Q. Qiu and M. Pedram.

Estimation of peak power dissipation in VLSI circuits using the limiting distributions of extreme order statistics,

*IEEE Trans. on Computer Aided Design, Vol. 20, No. 8*, Aug. 2001, pp. 942-956.X. Wu and M. Pedram.

Low-power sequential circuit design using T flip-flops,

*Int'l Journal of Electronics*, Taylor and Francis Publishing Group, Vol. 88, No.6, Jun. 2001, pp. 635-643.J. Oh and M. Pedram.

Gated clock routing for low power microprocessor design,

*IEEE Trans. on Computer Aided Design*, Vol. 20, No. 6, Jun. 2001, pp. 715-722.H. Vaishnav and M. pedram.

Alphabetic trees: theory and applications in layout-driven logic synthesis,

*IEEE Trans. on Computer Aided Design*, Vol. 20, No. 1, Jan. 2001, pp. 58-69.C-S. Ding, C-T. Hsieh and M. Pedram.

Improving efficiency of the Monte Carlo power estimation,

*IEEE Trans. on VLSI Systems*, Vol. 8, No. 5, Oct. 2000, pp. 584-593.X. Wu, M. Pedram. and L. Wang,

Multi-code state assignment for low power design,

*IEE Proc.-Circuits, Devices and Systems*, Vol. 147, No. 5, Oct. 2000, pp. 271-275.J. Chang and M. Pedram.

Codex-DP: Codesign of communicating systems using dynamic programming,

*IEEE Trans. on Computer Aided Design*, Vol. 19, No. 7, Jul. 2000, pp. 732-744.R. Marculescu, D. Marculescu and M. Pedram.

Stochastic sequential machine synthesis with application to constrained sequence generation,

*ACM Trans. on Design Automation of Electronic Systems*, Vol. 5, No. 3, Jul. 2000, pp. 658-681.D. Marculescu, R. Marculescu and M. Pedram.

Theoretical bounds for switching activity analysis in finite-state machines,

*IEEE Trans. on VLSI Systems*, Vol. 8, No. 3, Jun. 2000, pp. 335-339.Q. Wu, M. Pedram and X. Wu.

Clock-gating and its application to low power design of sequential circuits,

*IEEE Trans. on Circuits and Systems, Part 1*, Vol. 47, No. 3, Mar. 2000, pp. 415-420.P. Cocchini and M. Pedram.

Fanout optimization using bipolar LT-trees,

*IEEE Trans. on Computer Aided Design*, Vol. 19, No. 3, Mar. 2000, pp. 339-349.W. Chen, C-T. Hsieh and M. Pedram.

Simultaneous gate sizing and placement,

*IEEE Trans. on Computer Aided Design*, Vol. 19, No. 2, Feb. 2000, pp. 206-214.X. Wu and M. Pedram.

Bounded algebra and current-mode digital circuits,

*Journal of Computer Science and Technology*, Vol. 14, No. 6, Nov. 1999, pp. 551-557.M. Pedram and B. T. Preas,

Interconnection analysis for standard cell layouts,

*IEEE Trans. on Computer Aided Design*, Vol. 18, No. 10, Oct. 1999, pp. 1512-1518.X. Wu, Q. Qiu and M. Pedram.

A synthesis methodology for ECL circuits based on mixed voltage-current representation,

*Journal of Electronics*, Vol. 16, No. 4, Oct. 1999, pp. 359-366.A. Salek, J. Lou and M. Pedram.

An integrated logical and physical design flow for deep submicron circuits,

*IEEE Trans. on Computer Aided Design*, Vol. 18, No. 9, Sep. 1999, pp. 1305-1315.R. Marculescu, D. Marculescu and M. Pedram.

Sequence compaction for power estimation: Theory and practice,

*IEEE Trans. on Computer Aided Design*, Vol. 18. No. 7, Jul. 1999, pp. 973-993.H. Vaishnav and M. Pedram.

Delay optimal partitioning targeting low power VLSI circuits,

*IEEE Trans. on Computer Aided Design*, Vol. 18. No. 6, Jun. 1999, pp. 799-812.X. Wu, Q. Wu and M. Pedram.

Synchronous derived clock and synthesis of low power sequential circuits,

*Journal of Electronics*, Vol. 16, No. 2, Apr. 1999, pp. 130-145.C-Y. Tsui, M. Pedram.and A. M. Despain.

Low power state assignment targeting two and multilevel logic implementations,

*IEEE Trans. on Computer Aided Design*, Vol. 17. No. 12, Dec. 1998, pp. 1281-1291.Q. Wu, Q. Qiu, M. Pedram and C-S. Ding.

Cycle-accurate macro-models for RT-level power analysis,

*IEEE Trans. VLSI Systems*, , Vol. 6, No. 4, Dec. 1998, pp. 520-528.C-S. Ding, C-Y. Tsui and M. Pedram.

Gate-level power estimation using tagged probabilistic simulation,

*IEEE Trans. on Computer Aided Design*, Vol. 17. No. 11, Nov. 1998, pp. 1099-1107.C-T. Hsieh and M. Pedram.

Micro-processor power estimation using profile-driven program synthesis,

*IEEE Trans. on Computer Aided Design*, Vol. 17. No. 11, Nov. 1998, pp. 1080-1089.E. Macii, M. Pedram and F. Somenzi.

High level power modeling, estimation and optimization,

*IEEE Trans. on Computer Aided Design*, Vol. 17. No. 11, Nov. 1998, pp. 1061-1079.C-Y. Tsui and M. Pedram.

Accurate and efficient power simulation strategy by compacting the input vector set,

*Integration, the VLSI Journal*, Vol. 25 (1998), pp. 37-52.C-S. Ding, Q. Wu, C-T. Hsieh and M. Pedram.

Stratified random sampling for power evaluation,

*IEEE Trans. on Computer Aided Design*, Vol. 17, No. 6, Jun. 1998, pp. 465-471.R. Marculescu, D. Marculescu and M. Pedram.

Probabilistic modeling of dependencies during switching activity analysis,

*IEEE Trans. on Computer Aided Design*, Vol. 17, No. 2, Feb. 1998, pp. 73-83.S. Liu, M. Pedram and A. M. Despain.

State assignment based on two-dimensional placement and hypercube mapping,

*Integration, the VLSI Journal*, Vol. 24 (1997), pp. 101-118.J.-M. Chang and M. Pedram.

Energy Minimization Using Multiple Supply Voltages,

*IEEE Trans. on VLSI Systems*, Vol. 5. No. 4, Dec. 1997, pp. 436-443.R. Marculescu, D. Marculescu and M. Pedram.

Vector compaction using dynamic Markov models,

*IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences*, Vol. E80-A, No. 10, Oct. 1997.M. Pedram and X. Wu,

A new description of CMOS circuits at switch-level with applications,

*IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences*, Vol. E80-A, No. 10, Oct. 1997.J. Oh, I. Pyo and M. Pedram.

Constructing minimal spanning/Steiner trees with bounded path length,

*Integration, the VLSI Journal*, Vol. 22 (1997), pp. 137-163.M. Pedram. N. Bhat and E. S. Kuh,

Combining technology mapping and layout,

*The VLSI Design: An Int'l Journal of Custom-Chip Design, Simulation and Testing*, Vol. 5, No. 2 (1997), pp. 111-124.P. Tafertshofer and M. Pedram.

Factored edge-valued binary-decision diagrams,

*Formal Methods in System Design*, Kluwer Academic Publishers, Vol. 10, No. 2/3 (1997), pp. 137-164.M. Pedram and H. Vaishnav,

Power optimization in VLSI layout: A survey,

*The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology*, Kluwer Academic Publishers, Vol. 15, No. 3 (1997), pp. 221-232.S. Iman and M. Pedram.

An approach for multi-level logic optimization targeting low power,

*IEEE Trans. on Computer Aided Design*, Vol. 15, No. 8 (1996), pp. 889-901.Y-T. Lai, K-R. Pan and M. Pedram.

OBDD-based function decomposition: Algorithms and implementation,

*IEEE Trans. on Computer Aided Design*, Vol. 15, No. 8 (1996), pp. 977-990.D. Marculescu, R. Marculescu and M. Pedram.

Information theoretic measures for power analysis,

*IEEE Trans. on Computer Aided Design*, Vol. 15, No. 6 (1996), pp. 599-610.Y-T. Lai, M. Pedram and S. B. K. Vrudhula,

Formal verification using edge-valued binary decision diagrams,

*IEEE Trans. on Computers*, Vol. 45, No. 2 (1996), pp. 247-255.M. Pedram.

Power minimization in IC design: Principles and applications,

*ACM Trans. on Design Automation of Electronic Systems*, Vol. 1, No. 1 (1996), pp. 3-56.K. Chaudhary and M. Pedram.

Computing the area versus delay trade-off curves in technology mapping,

*IEEE Trans. on Computer Aided Design*, Vol. 14, No. 12 (1995), pp. 1480-1489.C-Y. Tsui, J. Monteiro, M. Pedram. S. Devadas, A. M. Despain and B. Lin,

Power estimation in sequential logic circuits,

*IEEE Trans. on VLSI Systems*, Vol. 3, No. 3 (1995), pp. 404-416 (1996 IEEE Circuits and Systems Society VLSI Systems Trans.**(Best Paper Award)**D. Singh, J. Rabaey, M. Pedram. F. Catthoor, S. Rajgopal, N. Sehgal and T. Mozdzen,

Power-conscious CAD tools and methodologies: A perspective,

*Proc. of the IEEE*, Vol. 83, No. 4 (1995), pp. 570-594.M. Pedram. B. S. Nobandegani and B. T. Preas,

Design and analysis of segmented routing channels for row-based FPGAs,

*IEEE Trans. on Computer Aided Design*, Vol. 13, No. 12 1994, pp. 1470-1479.M. Pedram.

Low power CAD: Trends and challenges,

*White paper on low power LSI technology, Nikkei Microdevices*, Nikkei Business Publications, Inc., Oct. 1994, pp. 129-139.M. Pedram.

Power estimation and optimization at the logic level,

*Int'l Journal of High Speed Electronics and Systems*, Vol. 5, No. 2 (1994), pp. 179-202.Y-T. Lai, M. Pedram and S. B. K. Vrudhula,

EVBDD-based algorithms for integer linear programming, spectral transformation and function decomposition,

*IEEE Trans. on Computer Aided Design*, Vol. 13, No. 8 (1994), pp. 959-975.C-Y. Tsui, M. Pedram and A. M. Despain,

Power efficient technology decomposition and mapping under an extended power consumption model,

*IEEE Trans. on Computer Aided Design*, Vol. 13, No. 9 (1994), pp.1110-1122.M. Pedram and E. S. Kuh,

BEAR-FP: A robust framework for floorplanning,

*Int'l Journal of High Speed Electronics and Systems*, Vol. 3, No. 1 (1992), pp. 137-170.W-W. Dai, B. Eschermann, E.S. Kuh and M. Pedram.

Hierarchical placement and floorplanning for BEAR,

*IEEE Trans. on Computer Aided Design*, Vol. 8, No. 12 (1989), pp. 1335-1349.

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G. Pasandi and M. Pedram. “qSeq: Full Algorithmic and Tool Support for Synthesizing Sequential Circuits in Superconducting SFQ Technology,”

*Proc. of Design Automation Conf.*, Dec. 2021.M. Nazemi, H. M. Kanakia, and M. Pedram. “Heuristics for Million-scale Two-level Logic Minimization,”

*Proc. of Int’l Conf. on Computer Aided Design*, Nov. 2021.S. Kundu, M. Pedram, and P. A. Beerel. “HIRE-SNN: Harnessing the Inherent Robustness of Deep Spiking Neural Networks by Training with Crafted Input Noise,”

*Proc. of IEEE Int’l Conf. on Computer Vision*, Oct. 2021.M. Munir, A. Gopikanna, A. Fayyazi, M. Pedram, and S. Nazarian. “qMC: A Formal Model Checking Verification Framework for Superconducting Logic,”

*Proc. of ACM Great Lakes Symp. on VLSI*, Jun. 2021, pp. 259-264.M. Nazemi, A. Fayyazi, A. Esmaili, A. Khare, S. Nazar Shahsavani, and M. Pedram. “NullaNet Tiny: Ultra-low-latency DNN Inference Through Fixed-function Combinational Logic,”

*Proc. of the IEEE Int’l Symp. on Field-Programmable Custom Computing Machines*, May 2021, pp. 266-267.H. M. Kanakia, M. Nazemi, A. Fayyazi, and M. Pedram, “ESPRESSO-GPU: Blazingly Fast Two-Level Logic Minimization,”

*Proc. of Design Automation and Test in Europe*, Feb. 2021.S. Kundu, G. Datta, M. Pedram, and P. Beerel. “Spike-thrift: Towards Energy-efficient Deep Spiking Neural Networks by Limiting Spiking Activity via Attention-guided Compression,”

*Proc. of the IEEE Winter Conference on Applications of Computer Vision*, Jan. 2021.S. Kundu, M. Nazemi, P. A. Beerel, and M. Pedram, “DNR: A Single-Shot Tunable Robust Pruning Framework Through Dynamic Network Rewiring of DNNs,”

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2021.M. Pedram. “Superconductive Single Flux Quantum Logic Devices and Circuits: Status, Challenges, and Opportunities,”

*Proc. of the IEEE Int’l Electron Devices Meeting*, Dec. 2020.M. Pedram. “qPALACE: A Suite of EDA Tools for Synthesis and Physical Design Optimization of Single Flux Quantum Logic Circuits,”

*Proc. of the 33rd International Symposium on Superconductivity*, Dec. 2020.M. Nazemi, A. Esmaili, A. Fayyazi, and M. Pedram. “SynergicLearning: Neural Network-based Feature Extraction for Highly-Accurate Hyperdimensional Learning,”

*Proc. of Int’l Conf. on Computer-Aided Design*, Nov. 2020.T. Lin and M. Pedram, "Retiming for High-performance Superconductive Circuits with Register Energy Minimization,"

*Proc. of Int’l Conf. on Computer-Aided Design*, Nov. 2020.A. Fayyazi, A. Esmaili, and M. Pedram. “HIPE-MAGIC: A Technology-Aware Synthesis and Mapping Flow for HIghly Parallel Execution of Memristor-Aided LoGIC,”

*Proc. of Int’l Symp. on Low Power Electronics and Design*, Aug. 2020.G. Pasandi, M. Peterson, M. Herrera, S. Nazarian, and M. Pedram. “Deep-PowerX: A Deep Learning-Based Framework for Low-Power Approximate Logic Synthesis,”

*Proc. of Int’l Symp. on Low Power Electronics and Design*, Aug. 2020.S. Nazarshahsavani and M. Pedram. “TDP-ADMM: A Timing Driven Placement Approach for Superconductive Electronic Circuits Using Alternating Direction Method of Multipliers,”

*Proc. of Design Automation Conf.*, Jul. 2020.M. Sun, P. Zhao, M. Gungor, M. Pedram, M. Leeser, and X. Lin. “3D CNN Acceleration on FPGA using Hardware-Aware Pruning,”

*Proc. of Design Automation Conf.*, Jul. 2020.T. Lin, P. Huang, L. Wang, and M. Pedram, "A Stochastic Framework for Virtualization Layer Deployment in Vehicular Cloud Networks,"

*Proc. of Int’l Conf. on Communications Workshops*, Jun. 2020.A. Holmes, M.R. Jokar, G. Pasandi, Y. Ding, M. Pedram, and F. Chong. “NISQ+: Boosting computational power of quantum computers by approximating quantum error correction,”

*Proc. of Int’l Symp. on Computer Architecture*, 2020.M. Vaeztourshizi, M. Kamal, and M. Pedram. “EGAN: A Framework for Exploring the Accuracy vs. Energy Efficiency Trade-off in Hardware Implementation of Error Resilient Applications,”

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2020.**(Best Paper Award)**H. Afzali-Kusha, M. Kamal, and M. Pedram. “Low-power Accuracy-configurable Carry Look-ahead Adder Based on Voltage Overscaling Technique,”

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2020.A. Esmaili and Massoud Pedram. “Energy-aware Scheduling of Jobs in Heterogeneous Cluster Systems Using Deep Reinforcement Learning,”

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2020.M.S. Abrishami, H. Ge, J. Calderon, M. Pedram, and S. Nazarian. “NN-PARS: A Parallelized Neural Network Based Circuit Simulation Framework,”

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2020.N. Katam, B. Zhang, and M. Pedram, “Ground Plane Partitioning for Current Recycling of Superconducting Circuits,”

*Proc. of Design Automation and Test in Europe*, Mar. 2020.S. Nazarshahsavani and M. Pedram. “A Timing-Uncertainty Aware Clock Tree Topology Generation Algorithm,”

*Proc. of Design Automation and Test in Europe*, Mar. 2020.S. Nazarian, A. Fayyazi, and M. Pedram. “qCG: A Low-Power Multi-Domain SFQ Logic Design and Verification Framework,”

*Proc. of the IEEE Int’l Conference on Computer Design*, Nov. 2019.A. E. Eshratifar, M. S. Abrishami, D. Eigen, and M. Pedram, “A Meta-Learning Approach for Custom Model Training,”

*Proc. of AAAI Conference on Artificial Intelligence*, 2019: 9937-9938.G. Pasandi and M. Pedram,

A Dynamic Programming-Based, Path Balancing Technology Mapping Algorithm Targeting Area Minimization,

in*IEEE/ACM International Conference on Computer Aided Design (ICCAD)*, Nov. 4-7, Westminster, CO, 2019M-S. Abrishami, M. Pedram, and S. Nazarian “CSM-NN: Current Source Model Based Logic Circuit Simulation - A Neural Network Approach,”

*Proc. of the IEEE Int’l Conference on Computer Design*, Nov. 2019.N. K. Katam, H. Zha, M. Pedram, and M. Annavaram. “Multi Fluxon Storage and its Implications for Microprocessor Design,”

*Proc. of the 14th European Conference on Applied Superconductivity*, Sept. 2019.A. E. Eshratifar, A. Esmaili, and M. Pedram. “BottleNet: A Deep Learning Architecture for Intelligent Mobile Cloud Computing Services,”

*Proc. of Int’l Symp. on Low Power Electronics and Design*, Jul. 2019.K. Han, S. Lee, J-J. Lee, W. Lee, and M. Pedram. “TIP: A Temperature Effect Inversion-Aware Ultra-Low Power System-on-Chip Platform,”

*Proc. of Int’l Symp. on Low Power Electronics and Design*, Jul. 2019.A. Fayyazi, S. Nazarian, and M. Pedram. “Timing Verification for Rapid Single-Flux-Quantum (RSFQ) Logic: New Paradigm and Models,”

*Proc. of the 17th Int’l Superconductive Electronics Conference*, Jul. 2019.S. Kundu, P. Beerel, and M. Pedram. “qBSA: Logic Design of a 32-bit Block-Skewed RSFQ Arithmetic Logic Unit,”

*Proc. of the 17th Int’l Superconductive Electronics Conference*, Jul. 2019.S. Nazarshahsavani and M. Pedram. “A Timing-Aware Synchronous Clock Tree Topology Generation Algorithm for Single Flux Quantum Logic Circuits,”

*Proc. of the 17th Int’l Superconductive Electronics Conference*, Jul. 2019.B. Zhang and M. Pedram. “'A Statistical Static Timing Analysis Tool for Superconducting Single-Flux-Quantum Circuits,”

*Proc. of the 17th Int’l Superconductive Electronics Conference*, Jul. 2019.N. K. Katam, H. Cong, and M. Pedram. “Reconfigurable Logic Cell for Superconducting Magnetic Field Programmable Gate Array,”

*Proc. of the 17th Int’l Superconductive Electronics Conference*, Jul. 2019.M. Annavaram, P. Beerel, S. Gupta, N. Katam, S. Nazarian, and M. Pedram. “Progress Towards an Open-Source Front-End CAD Flow for DC-Biased SFQ Logic Circuits,”

*Proc. of the 17th Int’l Superconductive Electronics Conference*, Jul. 2019.G. Pasandi and M. Pedram

Balanced Factorization and Rewriting Algorithms for Synthesizing Single Flux Quantum Logic Circuits

*Proc. Great Lake Symposium on VLSI*, May 9-11, Washington D.C, USA.S. Nazarshahsavani and M. Pedram. “A Hyper-Parameter Based Margin Calculation Algorithm for Single Flux Quantum Logic Cells,” Proc. of Symp. on VLSI, 2019: 645-650.

A. Fayyazi, S. Kundu, S. Nazarian, P.A. Beerel, and M. Pedram. “CSrram: Area-Efficient Low-Power Ex-Situ Training Framework for Memristive Neuromorphic Circuits Based on Clustered Sparsity,” Proc. of Symp. on VLSI, 2019: 465-470.

K. Singh, R. Gupta, V. Gupta, A. Fayyazi, M. Pedram, and S. Nazarian. “A Hybrid Framework for Functional Verification using Reinforcement Learning and Deep Learning,” Proc. of ACM Great Lakes Symp. on VLSI, May 2019, pp. 367-370.

L. Wang and M. Pedram. “Towards Green Mobile Networks: Concurrent User Association and Dynamic Switching in Cells,” Proc. of IEEE GreenTech Conference, Apr. 2019.

A. E. Eshratifar, A. Esmaili, and M. Pedram.

Towards Collaborative Intelligence Friendly Architectures for Deep Learning,

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2019, pp. 14-19.G. Pasandi, S. Nazarian, and M. Pedram.

Approximate Logic Synthesis: A Reinforcement Learning-Based Technology Mapping Approach,

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2019, pp. 26-32.A.D. Wong, K. Su, H. Sun, A. Fayyazi, M. Pedram, and S. Nazarian.

Semi-formal Verification Framework and Benchmark for Single Flux Quantum Technology,

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2019.M. Yan, Y. Song, Y. Feng, G. Pasandi, M. Pedram, and S. Nazarian.

kNN-CAM: A k-Nearest Neighbor-Based Configurable Approximate Floating Point Multiplier,

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2019, pp. 1-7.N.K. Katam, J. Kawa, and M. Pedram,

Challenges and the Status of Superconducting Single Flux Quantum Technology,

*Proc. of Design Automation and Test in Europe*, Mar. 2019, pp. 1781-1787.A. Fayyazi, S. Shababi, P. Nuzzo, S. Nazarian, and M. Pedram,

Deep Learning-Based Circuit Recognition Using Sparse Mapping and Level-Dependent Decaying Sum Circuit Representations,

*Proc. of Design Automation and Test in Europe*, Mar. 2019.M. Nazemi, G. Pasandi, and M. Pedram,

Energy-Efficient, Low-Latency Realization of Neural Networks through Boolean Logic Minimization,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2019.**(Best Paper Award)**A. Esmaili, M. Nazemi, and M. Pedram,

Modeling Processor Idle Times in MPSoC Platforms to Enable Integrated DPM, DVFS, and Task Scheduling Subject to a Hard Deadline,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2019.M. Pedram and Y. Wang.

Design Automation Methodology and Tools for Superconductive,

*Proc. of Int’l Conf. on Computer Aided Design,*Nov. 2018.M. Pedram and H. Afzali-Kusha.

An Ultra-Low-Power High-Speed Cache Memory Comprising Hybrid TFET-FinFET SRAM Cells,

*Proc. of Int'l Conf. on Solid State Devices and Materials*, Sep. 2018.M. Nazemi and M. Pedram.

Lop: An Open-Source Library for Customized Data Representation and Approximate Computing Targeting Energy and Resource Utilization Efficiencies in Deep Neural Networks,

*Proc. of the Int’l Symp. on Low Power Electronics and Design*, Jul. 2018.M. Vaeztourshizi, M. Kamal, A. Afzali-Kusha, and M. Pedram,

An Energy-Efficient, Yet Highly-Accurate, Approximate Non-Iterative Divider,

*Proc. of the International Symposium on Low Power Electronics and Design*, Jul. 2018.P. Beerel and M. Pedram.

Opportunities for Machine Learning in Electronic Design Automation,

*Proc. of the IEEE International Symposium on Circuits and Systems*, May 2018.P. Bogdan and M. Pedram.

Toward Enabling Automated Cognition and Decision-Making in Complex Cyber-Physical Systems,

*Proc. of the IEEE International Symposium on Circuits and Systems*, May 2018.G. Pasandi, A. Shafaei, and M. Pedram.

SFQmap: A Technology Mapping Tool for Single Flux Quantum Logic Circuits,

*Proc. of the IEEE International Symposium on Circuits and Systems*, May 2018.A. E. Eshratifar and M. Pedram.

Energy and Performance Efficient Computation Offloading for Deep Neural Networks in a Mobile Cloud Computing Environment,

*Proc. of ACM Great Lakes Symp. on VLSI*, May 2018.H. Afzali-Kusha, O. Akbari, M. Kamal, and M. Pedram.

Energy Consumption and Lifetime Improvement of Coarse-Grained Reconfigurable Architectures Targeting Low-Power Error-Tolerant Applications,

*Proc. of ACM Great Lakes Symp. on VLSI*, May 2018.L. Wang, S. Chen and M. Pedram.

Power Management of Cache-enabled Cooperative Base Stations Towards Zero Grid Energy,

*Proc. of IEEE International Conference on Communications*, May. 2018.H. Afzali-Kusha, A. Shafaei, and M. Pedram.

A 125mV 2ns-Access-Time 16Kb SRAM Design based on a 6T Hybrid TFET-FinFET Cell,

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2018.M. Nazemi, A. E. Eshratifar, and, and M. Pedram.

A Hardware-Friendly Algorithm for Scalable Training and Deployment of Dimensionality Reduction Models on FPGA,

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2018.R. Cai, A. Ren, N. Liu, L. Wang, M. Pedram, and Y. Wang.

VIBNN: Hardware Acceleration of Bayesian Neural Networks,

*Proc. of the 23rd ACM International Conference on Architectural Support for Programming Languages and Operating Systems*, Mar. 2018.O. Akbari, M. Kamal, A. Afzali-Kusha, M. Pedram, and M. Shafique.

PX-CGRA: Polymorphic Approximate Coarse-Grained Reconfigurable Architecture,

*Proc. of Design Automation and Test in Europe*, Mar. 2018.S. Nazar Shahsavani, B. Zhang, and M. Pedram.

Accurate Margin Calculation for Single Flux Quantum Logic Cells,

*Proc. of Design Automation and Test in Europe*, Mar. 2018.S. Lin, N. Liu, M. Nazemi, H. Li, C. Ding, Y. Wang, and M. Pedram.

FFT-Based Deep Learning Deployment in Embedded Systems,

*Proc. of Design Automation and Test in Europe*, Mar. 2018.S. Nazar Shahsavani, A. Shafaei, and M. Pedram.

A Placement Algorithm for Superconducting Logic Circuits Based on Cell Grouping and Super-Cell Placement,

*Proc. of Design Automation and Test in Europe*, Mar. 2018.R. Cai, A. Ren, L. Wang, M. Pedram, and Y. Wang.

Hardware Acceleration of Bayesian Neural Networks using Linear Feedback RAM based Gaussian Random Number Generators,

*Proc. of Int’l Conf. on Computer Design*, Nov. 2017.L. Wang, S. Chen, and M. Pedram.

Context-Driven Power Management in Cache-Enabled Base Stations using a Bayesian Neural Network,

*Proc. of Int’l Green and Sustainable Computing Conf.*, Oct. 2017.L. Wang, A. Shafaei, and M. Pedram.

Gate-All-Around FET Based 6T SRAM Design Using a Device-Circuit Co-Optimization Framework,

*Proc. of the 60th IEEE International Midwest Symposium on Circuits and Systems*, Aug. 2017, pp. 1113-1116.M. Nazemi, S. Nazarian, and M. Pedram.

High-performance FPGA implementation of equivariant adaptive separation via independence algorithm for Independent Component Analysis,

*Proc. of the 28th Annual IEEE International Conference on Application-specific Systems*, Architectures and Processors, Jul. 2017.L. Wang, S. Chen, and M. Pedram.

Optimal Joint Management of Charging and Battery Swapping Services for Electric Vehicles,

*Proc. of IEEE Green Technologies Conf.*, Mar. 2017.A. BanaGozar, M.A. Maleki, M. Kamal, A. Afzali-Kusha, and M. Pedram.

Sustainable Neuromorphic Computing in the Presence of Process Variation,

*Proc. of Design Automation and Test in Europe*, Mar. 2017.S. Vahdat, M. Kamal, A. Afzali-Kusha, Z. Navabi, and M. Pedram.

TruncApp: A Truncation-based Approximate Divider for Energy Efficient DSP Applications,

*Proc. of Design Automation and Test in Europe*, Mar. 2017.S. Nazar-shahsavani, A. Shafaei Bejestan, S. Nazarian, and M. Pedram.

A Thermally-Aware Energy Minimization Methodology for Global Interconnects,

*Proc. of Design Automation and Test in Europe*, Mar. 2017.M. Abdel-Majeed, H. Jeon, A. Shafaei, M. Annavaram, and M. Pedram.

Pilot Register File: Energy Efficient Register File for GPUs,

*Proc. of IEEE Symposium on High Performance Computer Architecture*, Feb. 2017.N. Katam, A. Shafaei, and M. Pedram.

Design of Multiple Fanout Clock Distribution Network for Rapid Single Flux Quantum Technology,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2017.L. Wang, Y. Wang, and M. Pedram.

Online QoS-Aware Charging Scheduling in Battery Swapping Stations under Dynamic Energy Pricing,

*Proc. of IEEE Online Conf. on Green Communications*, Nov. 2016.X. Lin, Y. Xue, P. Bogdan, Y. Wang, S. Garg, and M. Pedram.

Power-Aware Virtual Machine Mapping in the Data-Center-on-a-Chip Paradigm,

*Proc. of Int’l Conf. on Computer Design*, Oct. 2016.M. Hemmat, M. Kamal, A. Afzali-Kusha, and M. Pedram.

Hybrid TFET-MOSFET Circuits: An Approach to Design Reliable Ultra-Low Power Circuits in the presence of Process Variation,

*Proc. of IFIP/IEEE Int’l Conf. on Very Large Scale Integration*, Sep. 2016.L. Wang, T. Cui, S. Nazarian, Y. Wang, and M. Pedram.

Standard Cell Library Based Layout Characterization and Power Analysis for 10nm Gate-All-Around (GAA) Transistors,

*Proc. of IEEE Int’l System-on-Chip Conference*, Sep. 2016.X. Lin, M. Pedram, J. Tang, and Y. Wang.

A Profit Optimization Framework of Energy Storage Devices in Data Centers: Hierarchical Structure and Hybrid Types,

*Proc. of IEEE International Conference on Cloud Computing*, Jun. 2016.S. Chen and M. Pedram.

Efficient Peak Shaving in a Data Center by Joint Optimization of Task Assignment and Energy Storage Management,

*Proc. of IEEE International Conference on Cloud Computing*, Jun. 2016.A. Shafaei Bejestan, H. Afzali-Kusha, and M. Pedram.

Minimizing the Energy-Delay Product of SRAM Arrays using a Device-Circuit-Architecture Co-Optimization Framework,

*Proc. of Design Automation Conf.*, Jun. 2016.H. Afzali-Kusha, A. Shafaei Bejestan, and M. Pedram.

Optimizing the Operating Voltage of Tunnel FET-Based SRAM Arrays Equipped with Read/Write Assist Circuitry,

*Proc. of ACM Great Lakes Symp. on VLSI*, May 2016.X. Lin, Y. Wang, and M. Pedram.

A reinforcement learning-based power management framework for green computing data centers,

*Proc. of IEEE Int’l Conference on Cloud Engineering*, Apr. 2016.A. Shafaei Bejestan, Y. Wang, L. Chen, S. Chen, and M. Pedram,

Maximizing the Performance of NoC-based MPSoCs under Total Power and Power Density Constraints,

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2016.J. Li, X. Lin, S. Nazarian, and M. Pedram.

Negotiation-based resource provisioning and task scheduling algorithm for cloud systems,

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2016.T. Cui, J. Li, A. Shafaei Bejestan, S. Nazarian, and M. Pedram,

An Efficient Timing Analysis Model for 6T FinFET SRAM using Current-Based Method,

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2016.M. Kamal, A. Afzali-Kusha, and M. Pedram.

SEERAD: A High Speed yet Energy-Efficient Rounding-based Approximate Divider,

*Proc. of Design Automation and Test in Europe*, Mar. 2016.A. Shafaei and M. Pedram.

Energy-Efficient Cache Memories using a Dual-Vt 4T SRAM Cell with Read-Assist Techniques,

*Proc. of Design Automation and Test in Europe*, Mar. 2016.T. Cui, S. Chen, Y. Wang, Q. Zhu, S. Nazarian, and M. Pedram.

Optimal Co-Scheduling of HVAC Control and Battery Management for Energy-Efficient Buildings Considering State-of-Health Degradation,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2016.X. Lin, P. Bogdan, N. Chang, and M. Pedram.

Machine Learning-Based Energy Management in a Hybrid Electric Vehicle to Minimize Total Operating Cost,

*Proc. of Int’l Conf. on Computer Aided Design*, Nov. 2015.L. Wang, A. Shafaei, S. Chen, Y. Wang, S. Nazarian, and M. Pedram.

10nm Gate-Length Junctionless Gate-All-Around (JL-GAA) FETs Based 8T SRAM Design Under Process Variation Using a Cross-Layer Simulation,

*IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference*, Oct. 2015.X. Lin, A. Shafaei, S. Chen, T. Cui, and M. Pedram.

Impact of Technology and Voltage Scaling on LEON3 Processor Performance and Energy,

*IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference*, Oct. 2015.S. Chen, X. Lin, A. Shafaei, Y. Wang, and M. Pedram.

Analysis of Deeply Scaled Multi-Gate Devices with Design Centering across Multiple Voltage Regimes,

*IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference*, Oct. 2015.W. Lee, D. Shin, Y. Wang, S. Nazarain, and M. Pedram.

Design and Optimization of a Reconfigurable Power Delivery Network for Large-Area, DVS-Enabled OLED Displays,

*Proc. of the Int’l Symp. on Low Power Electronics and Design*, Jul. 2015.M.J. Dousti, M. Ghasemi-Gol, M. Nazemi, and M. Pedram.

ThermTap: An Online Power Analyzer and Thermal Simulator for Android Devices,

*Proc. of Int’l Symp. on Low Power Electronics and Design*, Jul. 2015.D. Shin, Y. Wang, N. Chang, and M. Pedram.

Reconfigurable three dimensional photovoltaic panel architecture for solar-powered time extension,

*Proc. of Int’l Symp. on Low Power Electronics and Design*, Jul. 2015.X. Lin, Y. Wang, N. Chang, P. Bogdan, and M. Pedram.

Optimizing fuel economy of hybrid electric vehicles using a Markov decision process model,

*Proc. of Intelligent Vehicle Symposium*, Jun. 2015.S. Wang, Y. Wang, X. Lin, and M. Pedram.

Hierarchical deployment and control of energy storage in datacenters,

*Proc. of IEEE Cloud Computing Conference*, Jun. 2015.S. Chen, Y. Wang, and M. Pedram.

A Joint Optimization Framework for Request Scheduling and Energy Storage Management in a Data Center,

*Proc. of IEEE Cloud Computing Conference*, Jun. 2015.Y. Wang, X. Lin, N. Chang, and M. Pedram.

Joint Automatic Control of the Powertrain and Auxiliary Systems to Enhance the Electromobility in Hybrid Electric Vehicles,

*Proc. of Design Automation Conf.*, Jun. 2015.Y. Wang, A. Shafaei, M. Rahimi, and M. Pedram.

Life-Cycle Energy Analysis of Sub-10nm Deeply-Scaled FinFET Micro-Processors,

Proc. of Int’l Symp. on Sustainable Systems & Technologies, May 2015.T. Cui, S. Chen, Y. Wang, Q. Zhu, S. Nazarian and M. Pedram.

Optimal Control of PEVs for Energy Cost Minimization and Frequency Regulation in the Smart Grid Accounting for Battery State-of-Health Degradation,

*Proc. of Design Automation Conf.*, Jun. 2015.T. Cui, B. Chen, Y. Wang, S. Nazarian, and M. Pedram.

Layout Characterization and Power Density Analysis for Shorted-Gate and Independent-Gate 7nm FinFET Standard Cells,

*Proc. of ACM Great Lakes Symp. on VLSI*, May 2015.A. Shafaie, Y. Wang, S. Ramadurgam, Y. Xue, P. Bogdan, and M. Pedram.

Analyzing the Dark Silicon Phenomenon in a Many-Core Chip Multi-Processor under Deeply-Scaled Process Technologies,

*Proc. of ACM Great Lakes Symp. on VLSI*, May 2015.M. Kamal, A. Iranfar, A. Afzali-kusha, and M. Pedram.

A thermal stress-aware algorithm for power and temperature management of MPSoCs,

*Proc. of Design Automation and Test in Europe*, Mar. 2015.J. Li, Q. Xie, Y. Wang, S. Nazarian, and M. Pedram.

Leakage power reduction for deeply-scaled FinFET circuits operating in multiple voltage regimes using fine-grained gate-length biasing technique,

*Proc. of Design Automation and Test in Europe*, Mar. 2015.X. Lin, Y. Wang, M. Pedram, J. Kim, and N. Chang.

Event-driven and sensorless photovoltaic system reconfiguration for electric vehicles,

*Proc. of Design Automation and Test in Europe*, Mar. 2015.D. Zhu, L. Chen, T. Pinkston, and M. Pedram.

TAPP: Temperature-Aware Application Mapping for NoC-Based Many-Core Processors,

*Proc. of Design Automation and Test in Europe*, Mar. 2015.Q. Xie, Y. Kim, D. Baek, Y. Wang, M. Pedram, and N. Chang.

Efficiency-driven design time optimization of a hybrid energy storage system with networked charge transfer interconnect,

*Proc. of Design Automation and Test in Europe*, Mar. 2015.M.J. Dousti and M. Pedram.

Power-efficient control of thermoelectric coolers considering distributed hot spots,

*Proc. of Design Automation and Test in Europe*, Mar. 2015.M.J. Dousti, A. Petraglia, and M. Pedram.

Accurate Electrothermal Modeling of Thermoelectric Generators,

*Proc. of Design Automation and Test in Europe*, Mar. 2015.R. Yarmand, B. Ebrahimi, H. Afzali-Kusha, A. Afzali-Kusha, and M. Pedram.

High Performance and High Yield 5 nm Underlapped FinFET SRAM Design Using P type Access Transistors,

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2015.S. Abrishami, A. Shafaei, Y. Wang, and M. Pedram.

Optimal Choice of FinFET Devices for Energy Minimization in Deeply Scaled Technologies,

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2015.A. Shafaei, Y. Wang, A. Petraglia, and M. Pedram.

Design Optimization of Sense Amplifiers using Deeply-scaled FinFET Devices,

*Proc. of Int’l Symp. on Quality Electronic Design*, Mar. 2015.L. Chen, D. Zhu, M. Pedram, and T. M. Pinkston.

Power punch: towards non-blocking power-gating of NoC routers,

*Proc. of IEEE International Symp. On High Performance Computer Architecture*, Feb. 2015.C. Guan, Y. Wang, X. Lin, S. Nazarian, and M. Pedram.

Reinforcement learning-based control of residential energy storage systems for electric bill minimization,

*Proc. of IEEE Consumer Communications & Networking Conf.*, Jan. 2015.J. Li, Y. Wang, X. Lin, S. Nazarian, and M. Pedram.

Negotiation-Based Task Scheduling and Storage Control Algorithm to Minimize User’s Electric Bills under Dynamic Prices,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2015.A. Shafaei, Y. Wang, and M. Pedram.

A Cross-Layer Framework for Designing and Optimizing Deeply-Scaled FinFET-Based SRAM Cells under Process Variations,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2015.J. Li, Y. Wang, T. Cui, S. Nazarian, and M. Pedram.

Negotiation-Based Task Scheduling to Minimize User’s Electricity Bills under Dynamic Energy Prices,

*Proc. of IEEE Online Conf. on Green Communications*, Nov. 2014.S. Chen, Y. Wang, and M. Pedram.

Optimal Offloading Control for a Mobile Device Based on a Realistic Battery Model and Semi-Markov Decision Process,

*Proc. of Int’l Conf. on Computer Aided Design*, Nov. 2014.X. Lin, Y. Wang, P. Bogdan, N. Chang, and M. Pedram.

Reinforcement Learning Based Power Management for Hybrid Electric Vehicles,

*Proc. of Int’l Conf. on Computer Aided Design*, Nov. 2014.M. Ghasemi-Gol, Y. Wang, and M. Pedram.

An optimization framework for the data centers to simultaneously minimize energy cost under day-ahead dynamic energy prices and provide regulation services,

*Proc. of Int’l Green Computing Conf.*, Nov. 2014.T. Cui, Q. Xie, Y. Wang, S. Nazarian, and M. Pedram.

7nm FinFET standard cell layout characterization and power density prediction in near- and super-threshold voltage regimes,

*Proc. of Int’l Green Computing Conf.*, Nov. 2014.A. Shafaei, Y. Wang, and M. Pedram.

Low write-energy STT-MRAMs using FinFET-based access transistors,

*Proc. of Int’l Conf. on Computer Design*, Oct. 2014.Q. Xie, Y. Wang, S. Chen, and M. Pedram.

Variation-aware joint optimization of supply voltage and sleep transistor size for the 7nm FinFET technology,

*Proc. of Int’l Conf. on Computer Design*, Oct. 2014.X. Lin, Y. Wang, N. Chang, and M. Pedram.

Power supply and consumption co-optimization of portable embedded systems with hybrid power supply,

*Proc. of Int’l Conf. on Computer Design*, Oct. 2014.S. Yue, Y. Wang, Q. Xie, M. Pedram. and N. Chang,

Model-free learning-based online management of hybrid electrical energy storage systems in electric vehicles,

*Proc. of 40th Annual Conf. of the IEEE Industrial Electronics Society*, Oct. 2014.S. Chen, Y. Wang, and M. Pedram.

Resource allocation optimization in a data center with energy storage devices,

*Proc. of 40th Annual Conf. of the IEEE Industrial Electronics Society*, Oct. 2014.D. Zhu, S. Yue, Y. Wang, N. Chang, and M. Pedram.

Cost-effective design of a hybrid electrical energy storage system for electric vehicles,

*Proc. of Int’l Conf. on Hardware/Software Codesign and System Synthesis*, Oct. 2014.M. Ghorbani, Y. Wang, P. Bogdan, and M. Pedram.

Prediction and control of bursty cloud workloads: a fractal framework,

*Proc. of Int’l Conf. on Hardware/Software Codesign and System Synthesis*, Oct. 2014.S. Chen, Y. Wang, X. Lin, Q. Xie, and M. Pedram.

Performance prediction for multiple-threshold 7nm-FinFET-based circuits operating in multiple voltage regimes using a cross-layer simulation framework,

*Proc. of IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conf.*, Oct. 2014.A. Shafaei, S. Chen, Y. Wang, and M. Pedram.

A cross-layer design framework and comparative analysis of SRAM cells and cache memories using different 7nm FinFET devices,

*Proc. of IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conf.*, Oct. 2014.Q. Xie, M.J. Dousti, and M. Pedram.

Therminator: A Thermal Simulator for Smartphones Producing Accurate Chip and Skin Temperature Maps,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Aug. 2014.S. Yue, L. Chen, D. Zhu, T. M. Pinkston, and M. Pedram.

Smart butterfly: reducing static power dissipation of network-on-chip with core-state-awareness,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Aug. 2014.J. Kim, Y. Wang, N. Chang, and M. Pedram.

Fast photovoltaic array reconfiguration for partial solar powered vehicles,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Aug. 2014.**(Best Paper Award)**W. Lee, Y. Wang, T. Cui, S. Nazarian, and M. Pedram.

Dynamic thermal management for FinFET-based circuits exploiting the temperature effect inversion phenomenon,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Aug. 2014.Q. Xie, X. Lin, Y. Wang, M.J. Dousti, A. Shafaei, M. Ghasemi-Gol, and M. Pedram.

5nm FinFET standard cell library optimization and circuit synthesis in near- and super-threshold voltage regimes,

*Proc. of IEEE Computer Society Annual Symp. on VLSI*, Jul. 2014.A. Shafaei, Y. Wang, X. Lin, and M. Pedram.

FinCACTI: Architectural analysis and modeling of caches with deeply-scaled FinFET devices,

*Proc. of IEEE Computer Society Annual Symp. on VLSI*, Jul. 2014.**(Best Paper Award)**S. Yue, D. Zhu, Y. Wang, and M. Pedram.

Distributed Load Demand Scheduling in Smart Grid to Minimize Electricity Generation Cost,

*Proc. of IEEE PES Society General Meeting*, Jul. 2014.Y. Wang, S. Yue, and M. Pedram.

State-of-health (SoH) aware optimal control of plug-in electric vehicles,

*Proc. of IEEE PES Society General Meeting*, Jul. 2014.T. Cui, Y. Wang, S. Nazarian, and M. Pedram.

An Electricity Trade Model for Multiple Power Distribution Networks in Smart Energy Systems,

*Proc. of IEEE PES Society General Meeting*, Jul. 2014.X. Lin, Y. Wang, N. Chang, and M. Pedram.

Optimal switch configuration design for reconfigurable photovoltaic modules,

*Proc. of IEEE PES Society General Meeting*, Jul. 2014.X. Lin, Y. Wang, Q. Xie, and M. Pedram.

Energy and Performance-Aware Task Scheduling in a Mobile Cloud Computing Environment,

*Proc. of IEEE Cloud*, Jun. 2014.S. Chen, M. Ghorbani, Y. Wang, P. Bogdan, and M. Pedram.

Trace-based analysis and prediction of cloud computing user behavior using the fractal modeling technique,

*Proc. of IEEE Conf. on Big Data*, Jun. 2014.M.J. Dousti and M. Pedram.

Power-Aware Deployment and Control of Forced-Convection and Thermoelectric Coolers,

*Proc. of Design Automation Conf.*, Jun. 2014.Y. Wang, Y. Zhang, M. Rahimi, and M. Pedram.

A Life-Cycle Energy and Inventory Analysis of FinFET Integrated Circuits,

*Proc. of Int' Symp. on Sustainable Systems and Technologies*, May 2014.Y. Fu, Y. Wang, X. Lin, S. Nazarian, and M. Pedram.

Energy Optimal Sizing of FinFET Standard Cells Operating in Multiple Voltage Regimes Using Adaptive Independent Gate Control,

*Proc. of ACM Great Lakes Symp. on VLSI*, May 2014.Y. Wang, X. Lin, and M. Pedram.

Optimal Power Switch Design Methodology for Ultra Dynamic Voltage Scaling with a Limited Number of Power Rails,

*Proc. of ACM Great Lakes Symp. on VLSI*, May 2014.M.J. Dousti, A. Shafaei, and M. Pedram.

Squash: A Scalable Quantum Mapper Considering Ancilla Sharing,

*Proc. of ACM Great Lakes Symp. on VLSI*, May 2014.D. Zhu, S. Yue, L. Chen, T. Pinkston, and M. Pedram.

Balancing On-Chip Network Latency in Multi-Application Mapping for Chip-Multiprocessors,

*Proc. of Int'l Parallel & Distributed Processing Symp.*, May 2014.T. Cui, Y. Wang, X. Lin, S. Nazarian, and M. Pedram.

A Probability Theory Based Price Determination Framework for Utility Companies in an Oligopolistic Energy Market,

*Proc. of IEEE Green Technologies Conf.*, Apr. 2014.Y. Wang, X. Lin, and M. Pedram.

A Game Theoretic Framework of SLA-Based Resource Allocation for Competitive Cloud Service Providers,

*Proc. of IEEE Green Technologies Conf.*, Apr. 2014.X. Lin, Y. Wang, and M. Pedram.

Designing the Optimal Pricing Policy for Aggregators in Smart Grid,

*Proc. of IEEE Green Technologies Conf.*, Apr. 2014.T. Cui, S. Chen, Y. Wang, S. Nazarian, and M. Pedram.

An Efficient Semi-Analytical Current Source Model for FinFET Devices in Near/Sub-Threshold Regime Considering Multiple Input Switching and Stack Effect,

*Proc. of Int'l Symp. on Quality Electronic Design*, Mar. 2014.X. Lin, Y. Wang, and M. Pedram.

Stack Sizing Analysis and Optimization for FinFET Logic Cells and Circuits Operating in the Sub/Near-Threshold Regime,

*Proc. of Int'l Symp. on Quality Electronic Design*, Mar. 2014.X. Lin, Y. Wang, S. Nazarian, and M. Pedram.

An Improved Logical Effort Model and Its Application to Optimal Sizing of Circuits Operating in Multiple Supply Voltage Regimes,

*Proc. of Int'l Symp. on Quality Electronic Design*, Mar. 2014.S. Chen, Y. Wang, and M. Pedram.

Concurrent placement, capacity provisioning, and request flow control for a distributed cloud infrastructure,

*Proc. of Design Automation and Test in Europe*, Mar. 2014.Y. Gao, S. Gupta, Y. Wang, and M. Pedram.

An energy-aware fault tolerant scheduling framework for soft error resilient cloud computing systems,

*Proc. of Design Automation and Test in Europe*, Mar. 2014.K. Kim, D. Shin, Q. Xie, Y. Wang, M. Pedram. and N. Chang,

FEPMA: Fine-grained event-driven power meter for Android smartphones based on device driver layer event monitoring,

*Proc. of Design Automation and Test in Europe*, Mar. 2014.W. Lee, Y. Wang, and M. Pedram.

VRCon: Dynamic reconfiguration of voltage regulators in a multicore platform,

*Proc. of Design Automation and Test in Europe*, Mar. 2014.D. Zhu, L. Chen, S. Yue, and M. Pedram.

Application mapping for express channel-based networks-on-chip,

*Proc. of Design Automation and Test in Europe*, Mar. 2014.D. Zhu, Y. Wang, N. Chang, and M. Pedram.

Optimal design and management of a smart residential PV and energy storage system,

*Proc. of Design Automation and Test in Europe*, Mar. 2014.M. Kamal, A. Ghasemazar, A. Afzali-Kusha, and M. Pedram.

Improving Efficiency of Extensible Processors by Using Approximate Custom Instructions,

*Proc. of Design Automation and Test in Europe*, Mar. 2014.Y. Wang, X. Lin, Q. Xie, N. Chang, and M. Pedram.

Minimizing state-of-health degradation in hybrid electrical energy storage systems with arbitrary source and load profiles,

*Proc. of Design Automation and Test in Europe*, Mar. 2014.Y. Wang, X. Lin, and M. Pedram.

Coordination of the smart grid and distributed data centers: a nested game-based optimization framework,

*Proc. of IEEE PES Innovative Smart Grid Technologies Conf.*, Feb. 2014.T. Cui, Y. Wang, S. Nazarian, and M. Pedram.

An electricity trade model for microgrid communities in smart grid,

*Proc. of IEEE PES Innovative Smart Grid Technologies Conf.*, Feb. 2014.M. Triki, Y. Wang, A. C. Ammari, and M. Pedram.

Reinforcement Learning Algorithms for Dynamic Power Management,

*Proc. of World Symp. on Computer Applications & Research*, Jan. 2014.A. Shafaei, M. Saeedi, and M. Pedram.

Qubit Placement to Minimize the Communication Overhead in Circuits Mapped to 2D Quantum Architectures,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2014.T. Cui, Y. Wang, X. Lin, S. Nazarian, and M. Pedram.

Semi-analytical current source modeling for FinFET devices in multiple voltage regimes with independent gate control and process variations,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2014.S. Chen, Y. Wang, and M. Pedram.

A Semi-Markovian Decision Process Based Control Method for Offloading Tasks from Mobile Devices to the Cloud,

*IEEE Global Communications Conf.*, Dec. 2013.M. Triki, Y. Wang, A.C. Ammari, and M. Pedram.

Reinforcement learning-based dynamic power management of a battery powered system supporting multiple active modes,

*Proc. of European Modeling Symp.*, Nov. 2013.X. Lin, Y. Wang, and M. Pedram.

An Optimal Control Policy in a Mobile Cloud Computing System Based on Stochastic Data,

*Proc. of IEEE Cloud Networking*, Nov. 2013.Q. Xie, J-M. Kim, Y. Wang, N. Chang, and M. Pedram.

Dynamic Thermal Management in Mobile Devices Considering the Thermal Coupling between Battery and Application Processor,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2013.X. Lin, Y. Wang, and M. Pedram.

Joint Sizing and Adaptive Independent Gate Control for FinFET Circuits Operating in Multiple Voltage Regimes Using the Logical Effort Method,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2013.Q. Xie, T. Cui, Y. Wang, S. Nazarian, and M. Pedram.

Semi-Analytical Current Source Modeling of FinFET Devices Operating in Near/Sub-Threshold Regime with Independent Gate Control and Considering Process Variation,

*Proc. of Int'l Conf. on Computer Design*, Oct. 2013.Y. Li, Y. Wang, S. Nazarain, and M. Pedram.

A Nested Game-Based Optimization Framework for Electricity Retailers in the Smart Grid with Residential Users and PEVs,

*Proc. of IEEE Online Conf. on Green Communications*, Oct. 2013.Y. Gao, Y. Wang, S-K. Gupta, and M. Pedram.

An Energy and Deadline Aware Resource Provisioning, Scheduling and Optimization Framework for Cloud Systems,

*Proc. of Int'l Conf. on Hardware/Software Codesign and System Synthesis*, Sep. 2013.D. Zhu, S. Yue, Y. Wang, N. Chang, and M. Pedram.

Designing a Residential Hybrid Electrical Energy Storage System Based on the Energy Buffering Strategy,

*Proc. of Int'l Conf. on Hardware/Software Codesign and System Synthesis*, Sep. 2013.H. Goudarzi and M. Pedram.

Force-directed Geographical Load Balancing and Scheduling for Batch Jobs in Distributed Datacenters,

*Proc. of IEEE Cluster*, Sep. 2013.X. Lin, Y. Wang, S. Yue, N. Chang, and M. Pedram.

A Framework of Concurrent Task Scheduling and Dynamic Voltage and Frequency Scaling in Real-Time Embedded Systems with Energy Harvesting,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Sep. 2013.S. Yue, D. Zhu, Y. Wang, N. Chang, and M. Pedram.

SIMES: A Simulator for Hybrid Electrical Energy Storage Systems,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Sep. 2013.S-Y. Park, Y. Wang, N. Chang, and M. Pedram.

Maximum Power Transfer Tracking in a Solar USB Charger for Smartphones,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Sep. 2013.M.J. Dousti and M. Pedram.

Platform-Dependent, Leakage-Aware Control of the Driving Current of Embedded Thermoelectric Coolers,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Sep. 2013.M. Saeedi, A. Shafaei, and M. Pedram.

Constant-Factor Optimization of Quantum Adders on 2D Quantum Architectures,

*Proc. of 5th Conf. on Reversible Computation*, Jul. 2013.Y. Wang, X. Lin, and M. Pedram.

A Bayesian Game Formulation of Power Dissipation and Response Time Minimization in a Mobile Cloud Computing System,

*Proc. of IEEE 2nd Int'l Conf. on Mobile Services*, Jun. 2013.H. Goudarzi and M. Pedram.

Geographical Load Balancing for Online Service Applications in Distributed Datacenters,

*Proc. of IEEE Cloud*, Jun. 2013.I. Hwang and M. Pedram.

Hierarchical Virtual Machine Consolidation in a Cloud Computing System,

*Proc. of IEEE Cloud*, Jun. 2013.A. Shafaei, M. Saeedi, and M. Pedram.

Optimization of Quantum Circuits for Interaction Distance in Linear Nearest Neighbor Architectures,

*Proc. of 50th Design Automation Conf.*, Jun. 2013.M.J. Dousti and M. Pedram.

LEQA: Latency Estimation for a Quantum Algorithm Mapped to a Quantum Circuit Fabric,

*Proc. of 50th Design Automation Conf.*, Jun. 2013.Q. Xie, Y. Wang, and M. Pedram.

Variability-Aware Design of Energy-Delay Optimal Linear Pipelines Operating in the Near-Threshold Regime and Above,

*Proc. of Great Lakes Symp. on VLSI*, May 2013.Y. Wang, S. Chen, and M. Pedram.

Service level agreement-based joint application environment assignment and resource allocation in cloud computing systems,

*Proc. of IEEE Green Technologies Conf.*, Apr. 2013.Y. Wang, X. Lin, and M. Pedram.

Accurate component model based optimal control for energy storage systems in households with photovoltaic modules,

*Proc. of IEEE Green Technologies Conf.*, Apr. 2013.V. Akhlaghi, M. Kamal, A. Afzali-Kusha, and M. Pedram.

An Efficient Network on-Chip Architecture Based on Isolating Local and non-Local Communications,

*Proc. of Design Automation and Test in Europe*, Mar. 2013.A. Shafaei Bajestan, M. Saeedi, and M. Pedram.

Reversible Logic Synthesis of k-Input, m-Output Lookup Tables,

*Proc. of Design Automation and Test in Europe*, Mar. 2013.Q. Xie, S. Yue, D. Shin, N. Chang, and M. Pedram.

Adaptive Thermal Management for Portable System Batteries by Forced Convection Cooling,

*Proc. of Design Automation and Test in Europe*, Mar. 2013.Y. Wang, X. Lin, S. Park, N. Chang, and M. Pedram.

Optimal Control of a Grid-Connected Hybrid Electrical Energy Storage System for Homes,

*Proc. of Design Automation and Test in Europe*, Mar. 2013.Y. Wang, X. Lin, J. Kim, N. Chang, and M. Pedram.

Capital Cost-Aware Design and Partial Shading-Aware Architecture Optimization of a Reconfigurable Photovoltaic System,

*Proc. of Design Automation and Test in Europee*, Mar. 2013.Y. Wang, S. Chen, H. Goudarzi, and M. Pedram.

Resource allocation and consolidation in a multi-core server cluster using a Markov decision process model,

*Proc. of Int'l Symp. on Quality Electronic Design*, Mar. 2013.Y. Wang, M. Triki, X. Lin, A. Ammari, and M. Pedram.

Hierarchical dynamic power management using model-free reinforcement learning,

*Proc. of Int'l Symp. on Quality Electronic Design*, Mar. 2013.Y. Wang, X. Lin, and M. Pedram.

A nested two stage game-based optimization framework in mobile cloud computing system,

*Proc. of IEEE Int'l Symp. on Service-Oriented System Engineering*, Mar. 2013.T. Cui, Y. Wang, S. Yue, S. Nazarian, and M. Pedram.

A Game-Theoretic Price Determination Algorithm for Utility Companies Serving a Community in Smart Grid,

*Proc. of IEEE PES Innovative Smart Grid Technologies Conf.*, Feb. 2013.Y. Wang, X. Lin, and M. Pedram.

A sequential game perspective and optimization of the smart grid with distributed data centers,

*Proc. of IEEE PES Innovative Smart Grid Technologies Conf.*, Feb. 2013.D. Zhu, Y. Wang, S. Yue, Q. Xie, M. Pedram. and N. Chang.

Maximizing Return on Investment of a Grid-Connected Hybrid Electrical Energy Storage System,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2013.D. Shin, N. Chang, W. Lee, Y. Wang, Q. Xie, and M. Pedram.

Online Estimation of the Remaining Energy Capacity in Mobile Systems Considering System-Wide Power Consumption and Battery Characteristics,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2013.Q. Xie, D. Zhu, Y. Wang, M. Pedram. Y. Kim, and N. Chang.

An Efficient Scheduling Algorithm for Multiple Charge Migration Tasks in Hybrid Electrical Energy Storage Systems,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2013.D. Shin, K. Kim, N. Chang, and M. Pedram.

Battery cell configuration for organic light emitting diode display in modern smartphones and tablet-PCs,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2012.X. Lin, Y. Wang, N. Chang, and M. Pedram.

Online Fault Detection and Tolerance for Photovoltaic Energy Harvesting Systems,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2012.M. Ghasemazar, H. Goudarzi, and M. Pedram.

Robust Optimization of a Chip Multiprocessor's Performance under Power and Thermal Constraints,

*Proc. of Int'l Conf. on Computer Design*, Oct. 2012.M. Kamal, Q. Xie, M. Pedram. A. Afzali-Kusha, and S. Safari.

An Efficient Reliability Simulation Flow for Evaluating the Hot Carrier Injection Effect in CMOS VLSI Circuits,

*Proc. of Int'l Conf. on Computer Design*, Oct. 2012**(Best Paper Award)**.S. Yue, D. Zhu, Y. Wang and M. Pedram.

Reinforcement Learning Based Dynamic Power Management with a Hybrid Power Supply,

*Proc. of Int'l Conf. on Computer Design*, Oct. 2012.T. Cui, Y. Wang, H. Goudarzi, S. Nazarian, and M. Pedram.

Profit Maximization for Utility Companies in an Oligopolistic Energy Market with Dynamic Prices,

*IEEE Online Conf. on Green Communications*, 2012.M. Triki, Y. Wang, A. C. Ammari, and M. Pedram.

Dynamic Power Management of a Computer with self power-managed components,

*Proc. of PATMOS*, 2012.S. Park, Y. Wang, Y. Kim, N. Chang, and M. Pedram.

Battery Management for Grid-connected Photovoltaic Power Generation Systems,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Jul. 2012.Y. Wang, X. Lin, N. Chang, and M. Pedram.

Dynamic Reconfiguration of Photovoltaic Energy Harvesting System in Hybrid Electric Vehicles,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Jul. 2012.I. Hwang, T. Kam, and M. Pedram.

A Study of the Effectiveness of CPU Consolidation in a Virtualized Multi-Core Server System,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Jul. 2012.W. Lee, Y. Wang, D. Shin, N. Chang, and M. Pedram.

Power Conversion Efficiency Characterization and Optimization for Smartphones,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Jul. 2012.I. Hwang and M. Pedram.

Portfolio Theory-Based Resource Assignment in a Cloud Computing System,

*Proc. of IEEE Cloud*, Jun. 2012.H. Goudarzi and M. Pedram.

Energy Efficient VM Placement in the Cloud Computing System,

*Proc. of IEEE Cloud*, Jun. 2012.X. Lin, Y. Wang, S. Yue, D. Shin, N. Chang, and M. Pedram.

Near-Optimal, Dynamic Module Reconfiguration in a Photovoltaic System to Combat Partial Shading Effects,

*Proc. of 49th Design Automation Conf.*, Jun. 2012.Y. Kim, S. Park, N. Chang, Q. Xie, Y. Wang, and M. Pedram.

Networked Architecture for Hybrid Electrical Energy Storage Systems,

*Proc. of 49th Design Automation Conf.*, Jun. 2012.H. Goudarzi, M. Ghasemazar, and M. Pedram.

SLA-based optimization of power and migration cost in cloud computing,

*Proc. of Int'l Symp. on Cluster, Cloud and Grid Computing*, May 2012.Y. Wang, S. Yue, L. Kerofsky, S. Deshpande, and M. Pedram.

A Hierarchical Control Algorithm for Managing Electrical Energy Storage Systems in Homes Equipped with PV Power Generation,

*Proc. of IEEE Green Technologies Conf.*, Apr. 2012.Y. Wang, X. Lin, Y. Kim, N. Chang, and M. Pedram.

Enhancing Efficiency and Robustness of a Photovoltaic Power System Under Partial Shading,

*Proc. of 13th Int'l Symp. on Quality of Electronic Design*, Mar. 2012.M. Kamal, A. Afzali-Kusha, S. Safari, and M. Pedram.

An Architecture-Level Approach for Mitigating the Impact of Process Variations on Extensible Processors,

*Proc. of Design Automation and Test in Europe*, Mar. 2012.M.J. Dousti and M. Pedram.

Minimizing the latency of quantum circuits during mapping to the ion-trap circuit fabric,

*Proc. of Design Automation and Test in Europe*, Mar. 2012.Q. Xie, X. Lin, Y. Wang, M. Pedram. D. Shin, and N. Chang,

State of health aware charge management in hybrid electrical energy storage systems,

*Proc. of Design Automation and Test in Europe*, Mar. 2012.Y. Wang, Q. Xie, M. Pedram. Y. Kim, N. Chang, and M. Poncino,

Multiple-source and multiple-destination charge migration in hybrid electrical energy storage systems,

*Proc. of Design Automation and Test in Europe*, Mar. 2012.Q. Xie, Y. Wang, M. Pedram. Y. Kim, D. Shin, and N. Chang,

Charge replacement in hybrid electrical energy storage systems,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2012.T.Cui, H. Goudarzi, S. Hatami, S. Nazarian, and M. Pedram.

Concurrent optimization of consumer's electrical energy bill and producer's power generation cost under a dynamic pricing model,

*Proc. of 3rd IEEE PES Innovative Smart Grid Technologies Conf.*, Jan. 2012.Y. Kim, S. Park, Y. Wang, Q. Xie, N. Chang, M. Poncino, and M. Pedram.

Balanced reconfiguration of storage banks in a hybrid electrical energy storage system,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2011.H. Goudarzi, S. Hatami, and M. Pedram.

Demand-side load scheduling incentivized by dynamic energy prices,

*Proc. of 2nd Int'l Conf. on Smart Grid Communications*, Oct. 2011.Q. Xie, Y. Wang, Y. Kim, N. Chang, and M. Pedram.

Charge allocation for hybrid electrical energy storage systems,

*Proc. of International Conf. on Hardware/Software Codesign and System Synthesis*, Oct. 2011.W. Lee, Y. Kim, Y. Wang, N. Chang, M. Pedram. and S. Han,

Versatile high-fidelity photovoltaic module emulation system,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Aug. 2011.Y. Wang, Y. Kim, Q. Xie, N. Chang, and M. Pedram.

Charge migration efficiency optimization in hybrid electrical energy storage (HEES) systems,

*Proc. of Int'l Symp. on Low Power Electronics and Design*, Aug. 2011.H. Goudarzi and M. Pedram.

Multi-dimensional SLA-based resource allocation for multi-tier cloud computing systems,

*Proc. of IEEE Cloud*, Jul. 2011.H. Goudarzi and M. Pedram.

Maximizing profit in the cloud computing system via resource allocation,

*Proc. of first international workshop on Data Center Performance*, held in conjunction with the 31st Int'l Conf. on Distributed Computing System, Minneapolis, MN, Jun. 2011.H. Abrishami, J. Lou, J. Qin, J. Froessl, and M. Pedram.

Post sign-off leakage power optimization,

*Proc. of 48th Design Automation Conf.*, Jun. 2011.Y. Wang, Q. Xie, A. Ammari, and M. Pedram.

Deriving a near-optimal power management policy using model-free reinforcement learning and Bayesian classification,

*Proc. of 48th Design Automation Conf.*, Jun. 2011.D. Shin, Y. Kim, N. Chang, and M. Pedram.

Dynamic voltage scaling of OLED displays,

*Proc. of 48th Design Automation Conf.*, Jun. 2011.F. Kashfi, S. Hatami, and M. Pedram.

Multi-objective optimization techniques for VLSI circuits,

*Proc. of 12th Int'l Symp. on Quality of Electronic Design*, Mar. 2011.M. Kamal, A. Afzali-Kusha, and M. Pedram.

Timing variation-aware custom instruction extension technique,

*Proc. of Design Automation and Test in Europe*, Mar. 2011.D. Shin, Y. Wang, N. Chang, and M. Pedram.

Battery-supercapacitor hybrid system for high-rate pulsed load applications,

*Proc. of Design Automation and Test in Europe*, Mar. 2011.M. GhasemAzar and M. Pedram.

Variability aware dynamic power management for chip multiprocessor architectures,

*Proc. of Design Automation and Test in Europe*, Mar. 2011.S. Hatami and M. Pedram.

Minimizing the electricity bill of cooperative users under a quasi-dynamic pricing model,

*Proc. of 1st IEEE International Conf. on Smart Grid Communications*, Oct. 2010.M. Pedram and I. Hwang,

Power and performance modeling in a virtualized server system,

*Green Comupting Workshop, 39th International Conf. on Parallel Processing Workshopp*, Sep. 2010, pp. 520-526.Y. Kim, N. Chang, Y. Wang, and M. Pedram.

Maximum power transfer tracking for a photovoltaic-supercapacitor energy system,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2010, pp. 307-312.M. Pedram. N. Chang, Y. Kim, and Y. Wang,

Hybrid electrical energy storage systems,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2010, pp. 363-368.J. Park, D. Shin, N. Chang, and M. Pedram.

Accurate modeling and calculation of delay and energy overheads of dynamic voltage scaling in modern high-performance microprocessors,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2010, pp. 419-424.M. GhasemAzar, E. Pakbaznia, and M. Pedram.

Minimizing energy consumption of a chip multiprocessor system through simultaneous core consolidation and dynamic voltage/frequency scaling,

*Proc. of IEEE Int'l Symp. on Circuits and Systems*, May 2010, pp.49-52.H. Abrishami, S. Hatami, and M. Pedram.

Analysis and optimization of sequential circuit elements to combat single-event timing upsets,

*Proc. of IEEE Int'l Symp. on Circuits and Systems*, May 2010, pp. 985-988.M. GhasemAzar, E. Pakbaznia, and M. Pedramm

Minimizing the power consumption of a chip multiprocessor under an average throughput constraint,

*Proc. of 11th Int'l Symp. on Quality of Electronic Design*, Mar. 2010, pp. 362-371.H. Abrishami, S. Hatami, and M. Pedramm

Multi-corner, energy-delay optimized, NBTI-aware flip-flop design,

*Proc. of 11th Int'l Symp. on Quality of Electronic Design*, Mar. 2010, pp. 652-659.E. Pakbaznia, M. GhasemAzar, and M. Pedram.

Temperature-aware dynamic resource provisioning in a power-optimized datacenter,

*Proc. of Design Automation and Test in Europe*, Mar. 2010, pp. 124-129.H-S. Jung and M. Pedram.

Optimizing the power delivery network in dynamically voltage scaled systems with uncertain power mode transition times,

*Proc. of Design Automation and Test in Europe*, Mar. 2010, pp. 351-356.S. Hatami and M. Pedram.

Efficient representation, stratification, and compression of variational CSM library waveforms using robust principle component analysis,

*Proc. of Design Automation and Test in Europe*, Mar. 2010, pp. 1285-1290.N. Mohyuddin, K. Patel, and M. Pedram.

Deterministic clock gating to eliminate wasteful activity due to wrong-path instructions in out-of-order superscalar processors,

*Proc. of Int'l Conf. on Computer Design*, Oct. 2009, pp. 166-172.E. Pakbaznia and M. Pedram.

Minimizing data center cooling and server power costs,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2009, pp. 145-150.S. Hatami, P. Feldmann, S. Abbaspour, M. Pedram.

Efficient compression and handling of current source model library waveforms,

*Proc. of Design Automation and Test in Europe*, Apr. 2009, pp. 1178-1183.E. Pakbaznia and M. Pedram.

Design and application of multi-modal power-gating structures,

*Proc. of 10th Int'l Symp. on Quality of Electronic Design*, Mar. 2009, pp. 120-126.M. Soltan and M. Pedram.

Durability of wireless networks of battery-powered devices,

*Proc. of Consumer Communications and Networking Conf.*, Jan. 2009, pp. 1-6.A-M. Rahmani, M. Daneshtalab, A. Afzali-Kousha, and M. Pedram.

Forecasting-based dynamic virtual channels allocation for power optimization of network-on-chips,

*Proc. of 22nd Int'l Conf. on VLSI Design*, Jan. 2009, pp. 151-156.M. Ghasemazar and M. Pedram.

Minimizing the energy cost of throughput in a linear pipeline by opportunistic time borrowing,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2008, pp. 155-160.N. Mohyuddin, E. Pakbaznia, and M. Pedram.

Probabilistic error propagation in a logic circuit using the Boolean difference calculus,

*Proc. of Int'l Conf. on Computer Design*, Oct. 2008, pp. 7-13.H. Abrishami, S. Hatami, and M. Pedram.

Characterization and design of sequential elements to combat soft errors,

*Proc. of Int'l Conf. on Computer Design*, Oct. 2008, pp. 194-199.M. Ghasemazar, B. Amelifard, and M. Pedram.

A mathematical solution to power optimal pipeline design by utilizing soft edge flip-flops,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2008 , pp. 33-38.**(Honorable Mention Award)**.H-S. Jung, P. Rong, and M. Pedram.

Stochastic modeling of a thermally-managed multi-core system,

*Proc. of Design Automation Conf.*, Jun. 2008, pp. 728-733.M. Soltan, I-K. Hwang, and M. Pedram.

Heterogeneous modulation for trading-off energy balancing with bandwidth efficiency in hierarchical sensor networks,

*Proc. of Int'l Symp. on a World of Wireless, Mobile and Multimedia Networks*, Newport Beach, CA, USA, Jun. 2008.M. Soltan, I-K. Hwang, and M. Pedram.

Modulation-aware energy balancing in hierarchical wireless sensor networks,

*Proc. of Int'l Symp. on Wireless Pervasive Computing*, Santorini, Greece, May 2008.H. Abrishami, S. Hatami, B. Amelifard, and M. Pedram.

NBTI-aware flip-flop characterization and design,

*Proc. of Great Lakes Symp. on VLSI*, May 2008, pp. 29-34.S. Hatami, H. Abrishami, and M. Pedram.

Statistical timing analysis of flip-flops considering codependent setup and hold times,

*Proc. of Great Lakes Symp. on VLSI*, May 2008, pp. 101-106.K. Patel, W-b. Lee, and M. Pedram.

In-order pulsed charge recycling in off-chip data buses,

*Proc. of Great Lakes Symp. on VLSI*, May 2008, pp. 371-374.H-S. Jung and M. Pedram.

Improving the efficiency of power management techniques by using Bayesian classification,

*Proc. of Int'l Symp. on Quality of Electronic Design*, Mar. 2008, pp. 178-183.H-S. Jung and M. Pedram.

Resilient dynamic power management under uncertainty,

*Proc. of Design Automation and Test in Europe*, Mar. 2008, pp. 224-229.E. Pakbaznia and M. Pedram.

Coarse-grain MTCMOS sleep transistor sizing using delay budgeting,

*Proc. of Design Automation and Test in Europe*, Mar. 2008, pp. 385-390.B. Amelifard, S. Hatami, H. Fatemi, and M. Pedram.

A current source model for CMOS logic cells considering multiple input switching and stack effect,

*Proc. of Design Automation and Test in Europee*, Mar. 2008, pp. 568-573.H-S. Jung and M. Pedram.

A stochastic local hot spot alerting technique,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2008, pp. 468-473.S. Koohi, M. Mirza-Aghatabar, S. Hessabi, and M. Pedram.

High-level modeling approach for analyzing the effects of traffic models on power and throughput in mesh-based NoCs,

*Proc. of 21st Int'l Conf. on VLSI Design*, Jan. 2008, pp. 249-254.H-S. Jung and M. Pedram.

Continuous frequency adjustment technique based on dynamic workload prediction,

*Proc. of 21st Int'l Conf. on VLSI Design*, Jan. 2008, pp. 415-420.E. Pakbaznia, F. Fallah, and M. Pedram.

Sizing and placement of charge recycling transistors in MTCMOS circuits,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2007, pp. 791-796.M. Mirza-Aghatabar, S. Koohi, S. Hessabi, and M. Pedram.

An empirical investigation of Mesh and Torus NoC topologies under different routing algorithms and traffic models,

*Proc. of 10th Euromicro Conf. on Digital System Design Architectures, Methods and Tools*, Aug. 2007, pp. 19-26.H. Fatemi, B. Amelifard and M. Pedram.

Power optimal MTCMOS repeater insertion for global buses,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2007, pp. 98-103.K. Patel, W-B. Lee, and M. Pedram.

Minimizing power dissipation during write operation to register files,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2007, pp. 183-188.B. Amelifard and M. Pedram.

Design of an efficient power delivery network in an SoC to enable dynamic power management,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2007, pp. 328-333.B. Amelifard and M. Pedram.

Optimal selection of voltage regulator modules in a power delivery network,

*Proc. of Design Automation Conf.*, Jun. 2007, pp. 168-173.H-S. Jung and M. Pedram.

A unified framework for system-level design: modeling and performance optimization of scalable networking systems,

*Proc. of Int'l Symp. on Quality of Electronic Design*, Mar. 2007, pp. 198-203.H-S. Jung and M. Pedram.

Dynamic Power Management under Uncertain Information,

*Proc. of Design Automation and Test in Europe*, Apr. 2007, pp. 1060-1065.K. Patel, W-b. Lee, and M. Pedram.

Active bank switching for temperature control of the register file in a microprocessor,

Proc. of Great Lakes Symp. on VLSI, Mar. 2007, pp. 231-234.C-S. Hwang, P. Rong, and M. Pedram.

Sleep transistor distribution in row-based MTCMOS designs,

*Proc. of Great Lakes Symp. on VLSII*, Mar. 2007, pp. 235-240.H-S. Jung, A. Hwang, and M. Pedram.

Flow-Through-Queue based Power Management for Gigabit Ethernet Controller,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2007, pp. 571-576.H. Fatemi, S. Nazarian, and M. Pedram.

A Current-based Method for Short Circuit Power Calculation under Noisy Input Waveforms,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2007, pp. 774-779.M. Soltan, M. Maleki, and M. Pedram.

Lifetime-aware hierarchical wireless sensor network architecture with mobile overlays,

*Proc. of IEEE Radio and Wireless Symp.*, Jan. 2007, pp. 325-328.M. Najibi, M. Salehi, A. Afzali Kusha, M. Pedram. S. M. Fakhraie, and H. Pedram.

Dynamic Voltage and Frequency Management Based on Variable Update Intervals for Frequency Setting,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2006, pp. 755-760.W-b. Lee, K. Patel and M. Pedram.

B2Sim: A fast micro-architecture simulator based on basic block characterization,

*Proc. of Third Int'l Conf. on Hardware/Software Codesign and System Synthesis*, Oct. 2006, pp. 199-204.H-S. Jung and M. Pedram.

Stochastic dynamic thermal management: A Markovian decision-based approach,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Oct. 2006, pp. 452-457.W-B. Lee, K. Patel, and M. Pedram.

Dynamic thermal management for MPEG-2 decoding,

*Proc. of Symp. on Low Power Electronics and Design*, Oct. 2006, pp. 316-321.B. Amelifard, F. Fallah, and M. Pedram.

Low-power fanout optimization using MTCMOS and Multi-Vt techniques,

*Proc. of Symp. on Low Power Electronics and Design*, Oct. 2006, pp. 334-337.E. Pakbaznia, F. Fallah, and M. Pedram.

Charge recycling in MTCMOS circuits: concept and analysis,

*Proc. of Design Automation Conf*, Jul. 2006, pp. 97-102.H. Fatemi, S. Nazarian, and M. Pedram.

Statistical logic cell delay analysis using a current-based model,

*Proc. of Design Automation Conf*, Jul. 2006, pp. 253-256.W-B. Lee, A. Iranli, M. Pedram.

Backlight dimming in power-aware mobile displays,

*Proc. of Design Automation Conf*, Jul. 2006, pp. 371-374.C-W. Kang and M. Pedram.

Low-power clustering with minimum logic replication for coarse-grained, antifuse-based FPGAs,

,*Proc. of Great Lakes Symp. on VLSI*, Apr. 2006, pp. 79-84.H. Fatemi, S. Abbaspour, M. Pedram. A. Ajami, and E. Tuncer,

SACI: Statistical static timing analysis of coupled interconnects,

,*Proc. of Great Lakes Symp. on VLSI*, Apr. 2006, pp. 241-246.S. Nazarian, A. Iranli, and M. Pedram.

Crosstalk analysis in nanometer technologies,

,*Proc. of Great Lakes Symp. on VLSI*, Apr. 2006, pp. 253-258.B. Amelifard, F. Fallah and M. Pedram.

Low-leakage SRAM design with dual Vt transistors,

*Proc. of Int'l Symp. on Quality of Electronic Design*, Mar. 2006, pp. 729-734.C-S. Hwang and M. Pedram.

Gate sizing and replication to minimize the effects of virtual ground parasitic resistances in MTCMOS designs,

*Proc. of Int'l Symp. on Quality of Electronic Design*, Mar. 2006, pp. 741-746.S. Nazarian, M. Pedram. S.K. Gupta, and M.A. Breuer,

STAX: Statistical crosstalk target set compaction,

*Proc. of Design Automation and Test in Europe*, Mar. 2006, pp. 172-177.A. Abdollahi and M. Pedram.

Analysis and synthesis of quantum circuits by using quantum decision diagrams,

*Proc. of Design Automation and Test in Europe*, Mar. 2006, pp. 317-322.S. Abbaspour, H. Fatemi, and M. Pedram.

Parameterized block-based non-Gaussian statistical interconnect timing analysis,

*Proc. of Design Automation and Test in Europe*, Mar. 2006, pp. 533-538.S. Nazarian and M. Pedram.

Cell delay analysis based on rate-of-current change,

*Proc. of Design Automation and Test in Europe*, Mar. 2006, pp. 539-544.B. Amelifard, F. Fallah and M. Pedram.

Reducing the sub-threshold and gate-tunneling leakage of SRAM cells using dual-Vt and dual-Tox assignment,

*Proc. of Design Automation and Test in Europe*, Mar. 2006, pp. 995-1000.P. Rong and M. Pedram.

Determining the optimal timeout values for a power-managed system based on the theory of Markovian processes: Offline and online algorithms,

*Proc. of Design Automation and Test in Europe*, Mar. 2006, pp. 1128-1133.S. Nazarian and M. Pedram.

CGTA: Current gain-based timing analysis for logic cells,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2006, pp. 67-72.C-S. Hwang and M. Pedram.

Timing-driven placement based on monotone cell ordering constraints,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2006, pp. 201-206.P. Rong and M. Pedram.

Power-aware scheduling and dynamic voltage setting for tasks running on a hard real-time system,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2006, pp. 473-478.S. Abbaspour, H. Fatemi, and M. Pedram.

Parameterized block-based non-Gaussian statistical gate timing analysis,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2006, pp. 947-952.S. Abbaspour, H. Fatemi, and M. Pedram.

VGTA: Variation-aware gate timing analysis,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Oct. 2005, pp. 351-356.B. Amelifard, F. Fallah, and M. Pedram.

Low-power fanout optimization using multiple threshold voltage inverters,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2005, pp. 95-98.A. Iranli, M. Maleki, and M. Pedram.

Energy-efficient strategies for deployment of a two-level wireless sensor network,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2005, pp. 233-238.P. Rong and M. Pedram.

Hierarchical dynamic power management with application scheduling,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2005, pp. 269-274.A. Abdollahi, F. Fallah, and M. Pedram.

An effective power mode transition technique in MTCMOS circuits,

*Proc. of Design Automation Conf.*, Jun. 2005, pp. 37-42.A. Abdollahi and M. Pedram.

A new canonical form for fast Boolean matching in logic synthesis and verification,

*Proc. of Design Automation Conf.*, Jun. 2005, pp. 379-384.**(Best Paper Award)**A. Iranli and M. Pedram.

DTM: Dynamic tone mapping for backlight scaling,

*Proc. of Design Automation Conf.*, Jun. 2005, pp. 612-617.S. Nazarian, M. Pedram. and E. Tuncer.

An empirical study of crosstalk in VDSM technologies,

*Proc. of Great Lakes Symp. on VLSI*, Apr. 2005, pp. 317-322.S. Abbaspour, H. Fatemi, and M. Pedram.

VITA: Variation-aware interconnect timing analysis for symmetric and skewed sources of variation considering variational ramp input,

*Proc. of Great Lakes Symp. on VLSI*, Apr. 2005, pp. 426-430.M. Maleki and M. Pedram.

QoM and lifetime-constrained random deployment of sensor networks for minimum energy consumption,

*The Fourth Int'l Conf. on Information Processing in Sensor Networks*, April 2005.A. Iranli, H. Fatemi, and M. Pedram.

Lifetime-aware intrusion detection under safeguarding constraints-ENIS-1 problem,

*The Fourth Int'l Conf. on Information Processing in Sensor Networks*, April 2005.A. Abdollahi, F. Fallah, and M. Pedram. Analysis and optimization of static power considering transition dependency of leakage current in VLSI circuits,

*Proc. of Int'l Symp. on Quality of Electronic Design*, Mar. 2005, pp. 77-82.B. Amelifard, F. Fallah, and M. Pedram.

Closing the gap between carry select adder and ripple carry adder: A new class of low-power high-performance adders,

*Proc. of Int'l Symp. on Quality of Electronic Design*, Mar. 2005, pp. 148-152.S. Nazarian, M. Pedram. E. Tuncer, and T. Lin,

Sensitivity-based gate delay propagation in static timing analysis,

*Proc. of Int'l Symp. on Quality of Electronic Design*, Mar. 2005, pp. 536-541.A. Iranli, H. Fatemi, and M. Pedram.

HEBS: Histogram equalization for backlight scaling,

*Proc. of Design Automation and Test in Europe*, Mar. 2005, pp. 346-351.S. Nazarian and M. Pedram.

Modeling and propagation of noisy waveforms in static timing analysis,

*Proc. of Design Automation and Test in Europe*, Mar. 2005, pp. 776-777.C-W. Kang and M. Pedram.

PackGen: A clustering technique for mapping coarse-grained, antifuse-based FPGAs,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2005, pp. 785-790.C-S. Hwang and M. Pedram.

PMP: Performance-driven multilevel partitioning by aggregating the preferred signal directions of I/O conduits,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2005, pp. 428-431.K. Choi, W. Lee, R. Soma and M. Pedram.

Dynamic voltage and frequency scaling under a precise energy model considering variable and fixed components of the system power dissipation,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2004, pp. 29-34.K. Choi, R. Soma and M. Pedram.

Dynamic voltage and frequency scaling based on workload decomposition,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2004, pp. 174-179.K. Choi, R. Soma and M. Pedram.

Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding,

*Proc. of 41st Design Automation Conf.*, Jun. 2004, pp. 544-549.S. Abbaspour, A. Ajami, M. Pedram. and E. Tuncer,

TFA: A threshold-based filtering algorithm for propagation delay and output slew calculation of high-speed VLSI interconnects,

*Proc. of Great Lakes Symp. on VLSI*, Apr. 2004, pp. 19-24.M. Maleki and M. Pedram.

Lifetime-aware multicast routing in wireless ad hoc networks,

*Proc. of IEEE Wireless Communication and Networking Conf.*, Mar. 2004, pp. 1317- 1323.R. Marculescu, M. Pedram. and J. Henkel,

Distributed multimedia system design: A holistic perspective,

*Proc. of Design Automation and Test in Europe*, Feb. 2004, Vol. 2, pp. 21342.K. Choi, R. Soma and M. Pedram.

Fine-grained dynamic voltage and frequency scaling for precise energy and performance trade-off based on the ratio of off-chip access to on-chip computation times,

*Proc. of Design Automation and Test in Europe*, Feb. 2004, Vol. 1, pp. 10004.W-C. Cheng, Y. Hou and M. Pedram.

Power minimization in a backlit TFT-LCD display by concurrent brightness and contrast scaling,

*Proc. of Design Automation and Test in Europe*, Feb. 2004, Vol. 1, pp. 10252.A. Iranli, K. Choi and M. Pedram.

A game theoretic approach to low energy wireless video streaming,

*Proc. of Design Automation and Test in Europe*, Feb. 2004, Vol. 1, pp. 10696.S. Abbaspour and M. Pedram.

Gate delay calculation considering the crosstalk capacitances,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2004, pp. 853-858.H. Shim, N. Chang, and M. Pedram.

A compressed frame buffer to reduce display power consumption in mobile systems,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2004, pp. 819-824.C-S. Hwang and M. Pedram.

Interconnect design methods for memory,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2004, pp. pp. 438-443.C-W. Kang, A. Iranli, and M. Pedram.

Technology Mapping and Packing for Coarse-Grained, Anti-Fuse Based FPGAs,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2004, pp. 209-211.A. Iranli, H. Fatemi, and M. Pedram.

A Game Theoretic Approach to Dynamic Energy Minimization in Wireless Transceivers,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2003, pp. 504-509.A. Abdollahi, F. Fallah, and M. Pedram.

Precomputation-based Guarding for Dynamic and Leakage Power Reduction,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Oct. 2003, pp. 90-97.F. Tari, P. Rong, and M. Pedram.

An Energy-aware Simulation Model and a Transaction Protocol for Dynamic Workload Distribution in Mobile Ad Hoc Networks,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Oct. 2003, pp. 444-449.K. Choi, K. Kim, and M. Pedram.

Energy-aware MPEG-4 FGS streaming,

*Proc. of 40th Design Automation Conf.*, Jun. 2003, pp. 912-915.P. Rong and M. Pedram.

Extending the lifetime of a network of battery-powered mobile devices by remote processing: a Markovian decision-based approach,

*Proc. of 40th Design Automation Conf.*, Jun. 2003, pp. 906-911.C-W. Kang, S. Abbaspour, and M. Pedram.

Buffer sizing for minimum energy-delay product by using an approximating polynomial,

*Proc. of Great Lakes Symp. on VLSI*, Apr. 2003, pp. 112-115.M. Maleki, K. Dantu, and M. Pedram.

Lifetime Prediction Routing in Mobile Ad Hoc Networks,

*Proc. of IEEE Wireless Communication and Networking Conf.*, Mar. 2003, pp. 1185-1190.A. H. Ajami, K. Banerjee, A. Mehrotra, and M. Pedram.

Analysis of IR-drop scaling with implications for deep submicron P/G network designs,

*Proc. of Int'l Symp. on Quality of Electronic Design*, Mar. 2003, pp. 35-40.S. Abbaspour, M. Pedram and P. Heydari,

Optimizing the energy-delay-ringing product in on-chip CMOS line drivers,

*Proc. of Int'l Symp. on Quality of Electronic Design*, Mar. 2003, pp. 261-266.P. Rong and M. Pedram.

Remaining battery capacity prediction for Lithium-ion batteries,

*Proc. of Design Automation and Test in Europe*, Mar. 2003, pp. 1148-1149.W-C. Chung and M. Pedram.

Chromatic encoding: a low power encoding technique for the digital visual interface,

*Proc. of Design Automation and Test in Europe*, Mar. 2003, pp. 694-699.Y. Aghaghiri, F. Fallah, and M. Pedram.

BEAM: bus encoding based on instruction-set-aware memories,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2003, pp. 3-8.S. Abbaspour and M. Pedram.

Calculating the effective capacitance for the RC interconnect in VDSM technologies,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2003, pp. 43-48.C-W. Kang and M. Pedram.

Technology mapping for low leakage power and high speed with hot-carrier effect consideration,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2003, pp. 203-208.A. Iranli, P. Rezvani, and M. Pedram.

Low power synthesis of finite state machines with mixed D and T flip-flops,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2003 pp. 803-808.K. Choi, K. Dantu, W-C. Cheng, and M. Pedram.

Frame-based dynamic voltage and frequency scaling for a MPEG decoder,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2002, pp. 732-737.P. Rong and M. Pedram.

Battery-aware power management based on markovian decision processes,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2002, pp. 712-717.A. Abdollahi, F. Fallah, and M. Pedram.

Runtime mechanisms for leakage current reduction in CMOS VLSI circuits,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2002, pp. 190-195.Y. Aghaghiri, F. Fallah, and M. Pedram.

Reducing transitions on memory buses using sector-based encoding technique,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2002, pp. 190-195.M. Maleki, K. Dantu, and M. Pedram.

Power-aware source routing protocol for mobile ad hoc networks,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2002, pp. 72-75.P. Heydari, S. Abbaspour and M. Pedram.

A comprehensive study of energy dissipation in lossy transmission lines driven by CMOS inverters,

*Proc. of IEEE Custom Integrated Circuits Conf.*, May 2002.Y. Aghaghiri, F. Fallah, and M. Pedram.

ALBORZ: address level bus power optimization,

*Proc. of Int'l Symp. on Quality of Electronic Design*, Mar. 2002, pp. 470-475.P. Rezvani and M. Pedram.

Concurrent and Selective Logic Extraction with Timing Consideration,

*Proc. of Design Automation and Test in Europe*, Mar. 2002, pp. 1086.Y. Aghaghiri, F. Fallah, and M. Pedram.

EZ Encoding: A Class of Irredundant Low Power Codes for Data Address and Multiplexed Address Buses,

*Proc. of Design Automation and Test in Europe*, Mar. 2002, pp. 1102.W. Chen, M. Pedram. and P. Buch,

Buffered routing tree construction under buffer placement blockages,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2002, pp. 381-386.P. Heydari and M. Pedram.

Interconnect energy dissipation modeling in high-speed ULSI circuits,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2002, pp. 132-1377W-C. Cheng and M. Pedram.

Software-only bus encoding techniques for an embedded system,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 2002, pp. 126-1311A. Ajami, K. Banarjee and M. Pedram.

Analysis of substrate thermal gradient effects on optimal buffer insertion,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2001, pp. 44-48.P. Heydari and M. Pedram.

Model reduction of variable-geometry interconnects using variational spectrally-weighted balanced truncation,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2001, pp. 586-591.P. Heydari and M. Pedram.

Jitter-induced power/ground noise in CMOS PLLs: a design perspective,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Sep. 2001, pp. 209-213.P. Heydari and M. Pedram.

Analysis and reduction of capacitive coupling noise in high-speed VLSI circuits,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Sep. 2001, pp. 104-109.Y. Aghaghiri, F. Fallah, and M. Pedram.

Irredundant address bus encoding for low power,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 2001, pp. 82-187.A. Ajami, K. Banerjee, and M. Pedram.

Non-uniform chip-temperature dependent signal integrity,

*Proc. of IEEE Symp. on VLSI Technology and Circuits*, Jun. 2001, pp. 145-146.Q. Qiu, Q. Wu and M. Pedram.

Dynamic power management in a mobile multimedia system with guaranteed quality-of-service,

*Proc. of 38th Design Automation Conf.*, Jun. 2001, pp. 834-839.A. Ajami, K. Banerjee, M. Pedram. and L.van Ginneken,

Analysis of non-uniform temperature-dependent interconnect performance in high performance ICs

*Proc.of 38th Design Automation Conf.*, Jun.2001,pp.567-572.A. Ajami, K. Banerjee, and M. Pedram.

Effects of non-uniform substrate temperature on the clock signal integrity in high performance designs,

*Proc. of IEEE Custom Integrated Circuits Conf.*, May 2001, pp. 233-236.K. Banerjee, M. Pedram. and A. Ajami,

Analysis and optimization of thermal issues in high performance VLSI,

*Proc. of Int'l Symp. on Physical Design*, Apr. 2001, pp. 230-237.C-T Hsieh, L-S. Chen, and M. Pedram.

Microprocessor power analysis by labeled simulation,

*Proc. of Design Automation and Test in Europe*, Mar. 2001, pp. 182-189.W-C. Cheng and M. Pedram.

Memory bus encoding for low power: a tutorial,

*Proc. of Int'l Symp. on Quality of Electronic Design,*Mar. 2001.A. Ajami and M. Pedram.

Post-layout timing-driven cell placement using an accurate net length model with movable Steiner points,

*Proc. of Asia and South Pacific Design Automation Conf.,*Jan. 2001, pp.595-600.W-C. Cheng and M. Pedram.

Low power techniques for address encoding and memory allocation,

*Proc. of Asia and South Pacific Design Automation Conf.,*Jan. 2001, pp. 245-250.M. Pedram.

Power management and optimization in embedded systems,

*Proc. of Asia and South Pacific Design Automation Conf.,*Jan. 2001, pp. 239-244.P. Heydari and M. Pedram.

Balanced truncation with spectral shaping for RLC interconnects,

*Proc. of Asia and South Pacific Design Automation Conf.,*Jan. 2001, 203-208.W. Chen and M. Pedram.

Simultaneous gate sizing and fanout optimization,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 2000, pp. 374-378.P. Heydari and M. Pedram.

Analysis and optimization of ground bounce in digital CMOS circuits,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Sep. 2000, pp. 121-126.**(Best Paper Award)**W-C. Cheng and M. Pedram.

Power-optimal encoding for DRAM address bus,

*Proc. of Symp. on Low Power Electronics and Design,*Jul. 2000, pp. 250-252.X. Wu and M. Pedram.

Low power sequential circuit design by using priority encoding and clock gating,

*Proc. of Symp. on Low Power Electronics and Design*, Jul. 2000, pp. 143-148.Q. Qiu, Q. Wu and M. Pedram.

OS-directed power management for mobile electronic systems,

*Proc. of 39th Power Source Conf.*, Jun. 2000, pp. 506-509.X. Wu and M. Pedram.

Propagation algorithm of behavior probability in power estimation based on multiple-valued logic,

*Proc. of Int'l Symp. on Multiple-Valued Logic*, May 2000, pp. 453-459.S. Ou and M. Pedram.

Timing-driven placement based on partitioning with dynamic cut-net control,

*Proc. of 37th Design Automation Conf.*, Jun. 2000, pp. 472-476.Q. Wu, Q. Qiu and M. Pedram.

Dynamic power management of complex systems using generalized stochastic Petri nets,

*Proc. of 37th Design Automation Conf.*, Jun. 2000, pp. 352-356.P. Heydari and M. Pedram.

Analysis of jitter due to power-supply noise in phase-locked loops,

*Proc. of IEEE Custom Integrated Circuits Conf.*, May 2000.C-T. Hsieh and M. Pedram.

Architectural power optimization by bus splitting,

*Proc. of Design Automation and Test in Europe*, Mar. 2000, pp. 612.Q. Wu, Q. Qiu and M. Pedram.

An interleaved dual-battery power supply for battery-operated electronics,

*Proc. of Asia and South Pacific Design Automation Conf.,*Jan. 2000, pp. 387-390.X. Wu, J. Wei, M. Pedram and Q. Wu,

Low power design of sequential circuits using a quasi-synchronous derived clock,

*Proc. of Asia and South Pacific Design Automation Conf.,*Jan. 2000, pp. 345-350.M. Pedram and X. Wu,

Analysis of clocked-power CMOS with application to the design of energy recovery circuits,

*Proc. of Asia and South Pacific Design Automation Conf.,*Jan. 2000, pp. 339-344.J. Lou, W. Chen and M. Pedram.

Concurrent logic restructuring and placement for timing closure,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1999, pp. 31-35.P. Rezvani, A. Ajami, M. Pedram and H. Savoj,

LEOPARD: A logical effort-based fanout optimizer for area and delay,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1999, pp. 516-519.Q. Qiu, Q. Wu and M. Pedram.

Stochastic modeling of a power-managed system: construction and optimization,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 1999, pp. 194-199.R. Marculescu, D. Marculescu and M. Pedram.

Non-stationary effects in trace-driven power analysis,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 1999, pp. 133-138.M. Pedram and Q. Wu,

Design considerations for battery-powered electronics,

*Proc. of 36th Design Automation Conf.*, Jun. 1999, pp. 861-866.Q. Qiu and M. Pedram.

Dynamic power management based on continuous-time Markov decision processes,

*Proc. of 36th Design Automation Conf.*, Jun. 1999, pp. 555-561.A. Salek, J. Lou and M. Pedram.

MERLIN: Semi-order-dependent hierarchical buffered routing tree generation using local neighborhood search,

*Proc. of 36th Design Automation Conf.*, Jun. 1999, pp. 472-478.W. Chen, C-T. Hsieh and M. Pedram.

Gate sizing with controlled displacement,

*Proc. of Int'l Symp. on Physical Design*, Apr. 1999, pp. 127-132.J. Chang and M. Pedram.

Codex-DP: codesign of communicating systems using dynamic programming,

*Proc. of Design Automation and Test in Europe*, Mar. 1999, pp. 568-573.M. Pedram and Q. Wu,

Battery-powered digital CMOS design,

*Proc. of Design Automation and Test in Europe*, Mar. 1999, pp. 72-76.M. Pedram. C-Y. Tsui and Q. Wu,

An integrated battery-hardware model for portable electronics,

*Proc. of Asia and South Pacific Design Automation Conf.*, Feb. 1999, pp. 109-112.P. Rabiei and M. Pedram.

Model order reduction of large circuits using balanced truncation,

*Proc. of Asia and South Pacific Design Automation Conf.*, Feb. 1999, pp. 237-240.S. Ou and M. Pedram.

Timing-driven bipartitioning with replication using iterative quadratic programming,

*Proc. of Asia and South Pacific Design Automation Conf.*, Feb. 1999, pp. 105-108.A. Salek, J. Lou and M. Pedram.

A simultaneous routing tree construction and fanout optimization algorithm,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1998, pp. 625-630.P. Cocchini, M. Pedram. G. Piccinini and M. Zamboni,

Fanout optimization under a submicron transistor-level delay model,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1998, pp. 551-556.C-S. Ding, C-T. Hsieh and M. Pedram.

Improving sampling efficiency for total power estimation at the system level,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 1998.D. Marculescu, R. Marculescu and M. Pedram.

Theoretical bounds for switching activity analysis in finite-state machines,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 1998.Q. Qiu, Q. Wu and M. Pedram.

Maximum power estimation using the limiting distributions of extreme order statistics,

*Proc. of 35th Design Automation Conf.*, Jun. 1998, pp. 684-689.A. Salek, J. Lou and M. Pedram.

A DSM design flow: putting floorplanning, technology mapping and gate placement together,

*Proc. of 35th Design Automation Conf.*, Jun. 1998, pp. 287-290.J. Oh and M. Pedram.

Multi-pad power/ground network design for uniform distribution of ground bounce,

*Proc. of 35th Design Automation Conf.*, Jun. 1998, pp. 128-133.P. Heydari and M. Pedram.

Calculation of ramp response of lossy transmission lines using two-port network functions,

*Proc. of of Int'l Symp. on Physical Design*, Apr. 1998, pp. 152-157.D. Marculescu, R. Marculescu and M. Pedram.

Trace-driven steady-state probability estimation in FSMs with application to power estimation,

*Proc. of Design Automation and Test in Europe*, Feb. 1998, pp. 774-779.J. Oh and M. Pedram.

Gated clock routing minimizing the switched capacitance,

*Proc. of Design Automation and Test in Europe*, Feb. 1998, pp. 692-697.M. Pedram.

Logical-physical co-design for deep submicron circuits: challenges and solutions,

*Proc. of Asia and South Pacific Design Automation Conf.*, Feb. 1998, pp. 137-142.J. Lou, A. Salek and M. Pedram.

An integrated flow for technology remapping and placement of sub-half-micron circuits,

*Proc. of Asia and South Pacific Design Automation Conf.*, Feb. 1998, pp. 295-300.J. Oh and M. Pedram.

Power reduction in microprocessor chips by gated clock routing,

*Proc. of Asia and South Pacific Design Automation Conf.*, Feb. 1998, pp. 313-318.Q. Wu, M. Pedram and X. Wu,

A new design of double edge triggered flip-flops,

*Proc. of Asia and South Pacific Design Automation Conf.*, Feb. 1998, pp. 417-421.J. Lou, A. Salek and M. Pedram.

An exact solution to simultaneous technology mapping and linear placemenet,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Oct. 1997, pp. 130-135.R. Marculescu, D. Marculescu and M. Pedram.

Block entropy and high-order temporal effects in composite sequence compacton for finite state machines,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 1997, 190-195.Q. Qiu, Q. Wu, M. Pedram and C-S. Ding,

Cycle-accurate macro-models for RT-level power analysis,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 1997, pp. 125-130.R. Marculescu, D. Marculescu and M. Pedram.

Sequence compacton for probabilistic analysis of finite state machines,

*Proc. of 34th Design Automation Conf.*, Jun. 1997, pp. 12-15.C-S. Ding, Q. Wu, C-T. Hsieh and M. Pedram.

Statistical estimation of the cumulative distribution function for power dissipation in VLSI circuits,

*Proc. of 34th Design Automation Conf.*, Jun. 1997, pp. 371-376.C-Y. Tsui, K-K. Chan, Q. Wu, C-S. Ding and M. Pedram,A power estimation framework for designing low power portable video applications,

*Proc. of 34th Design Automation Conf.*, Jun. 1997, pp. 421-424.E. Macii, M. Pedram and F. Somenzi,

High level power modeling, estimation and optimization,

*Proc. of 34th Design Automation Conf.*, Jun. 1997, pp. 504-510.R. Marculescu, D. Marculescu and M. Pedram.

Hierarchical sequence compaction for power estimation,

*Proc. of 34th Design Automation Conf.*, Jun. 1997, pp. 570-575.C-T. Hsieh, M. Pedram. H. Mehta and F. Rastgar,

Profile-driven program synthesis for evaluation of system power dissipation,

*Proc. of 34th Design Automation Conf.*, Jun. 1997, pp. 576-581.X. Wu and M. Pedram,Design of ternary CCD circuits referencing to current mode CMOS circuits,

*Proc. of Int'l Symp. on Multiple-Valued Logic*, May 1997, pp. 209-214.Q. Wu, M. Pedram and X. Wu,

Clock-gating and its application to low power design of sequential circuits,

*Proc. of IEEE Custom Integrated Circuits Conf.*, May 1997, pp. 479-482.Q. Wu, M. Pedram and X. Wu,

A note on the relationship between signal probability and switching activity,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 1997, pp. 117-120.R. Marculescu, D. Marculescu and M. Pedram.

Adaptive models for input data compaction for power simulators,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 1997, pp. 391-396.Q. Wu, C-S. Ding, C-T. Hsieh and M. Pedram,

Statistical design of macro-models for RT-level power evaluation,

*Proc. of Asia and South Pacific Design Automation Conf.*, Jan. 1997, pp. 523-528.M. Pedram and X. Wu,

A new description of CMOS circuits at switch-level,

*Proc. Asia and South Pacific Design Automation Conf.*, Jan. 1997, pp. 551-556.C-T. Hsieh, C-S. Ding, Q. Wu and M. Pedram,

Statistical sampling and regression estimation in power macromodeling,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1996, pp. 583-588.C-S. Ding, C-T. Hsieh, Q. Wu and M. Pedram,

Stratified random sampling for power estimation,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1996, pp. 577-582.J-M. Chang and M. Pedram.

Module assignment for low power,

*Proc. of European Design Automation Conf.*, Sep. 1996, pp. 376-381.J-M. Chang and M. Pedram.

Energy minimization using multiple supply voltages,

*Proc. of Symp. on Low Power Electronics and Design*, Aug. 1996, pp. 157-162.R. Marculescu, D. Marculescu and M. Pedram.

Stochastic sequential machine synthesis targeting constrained sequence generation,

*Proc. of 33rd Design Automation Conf.*, Jun. 1996, page 696-701.J. Oh, I. Pyo and M. Pedram,

Constructing lower and upper bounded delay routing trees using linear programming,

*Proc. of 33rd Design Automation Conf.*, Jun. 1996, page 401-404.C-Y. Tsui, D. Marculescu, R. Marculescu and M. Pedram.

Reducing the runtime of simulation-based power estimation by input vector compaction,

*Proc. of 33rd Design Automation Conf.*, Jun. 1996, page 165-168.S. Iman and M. Pedram,

POSE: Power optimization and synthesis environment,

*Proc. of 33rd Design Automation Conf.*, Jun. 1996, page 21-26.**(Best Paper Award)**I. Pyo, J. Oh and M. Pedram,

Constructing routing trees with bounded difference Elmore delay,

*Proc. of IEEE Int'l Symp. Circuits and Systems*, May 1996, page.K-R. Pan and M. Pedram.

FPGA synthesis for minimum area, delay and power consumption,

*Proc. of European Design and Test Conf.*, Mar. 1996, page 603.I. Pyo, J. Oh and M. Pedram,

Constructing minimal spanning/Steiner trees with bounded path length,

*Proc. of European Design and Test Conf.*, Mar. 1996, pp. 244-249.S. Iman and M. Pedram,

Two-level logic minimization for low power,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1995, pp. 433-438.H. Vaishnav and M. Pedram,

Delay optimal partitioning targeting low power VLSI circuits,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1995, pp. 638-643.C-S. Ding and M. Pedram,

Tagged probabilistic simulation provides accurate and efficient power estimates at the gate level,

*Proc. of Symp. of Low Power Electronics*, Sep. 1995, pp. 42-43.H. Vaishnav and M. Pedram,

Logic extraction based on normalized netlengths,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Oct. 1995, pp. 658-663.R. Marculescu, D. Marculescu and M. Pedram.

Efficient power estimation for highly correlated input streams,

*Proc. of 32nd Design Automation Conf.*, Jun. 1995, pp. 628-634.J-M. Chang and M. Pedram.

Low power register allocation and binding,

*Proc. of 32nd Design Automation Conf.*, Jun. 1995, pp. 29-35.S. Iman and M. Pedram,

Logic extraction and decomposition for low power,

*Proc. 32nd Design Automation Conf.*, pp. 248-253, Jun. 1995.H. Vaishnav and M. Pedram,

Minimizing the routing cost during logic extraction,

*Proc. of 32nd Design Automation Conf.*, pp. 70-75, Jun. 1995.S-M. Liu, M. Pedram and A. M. Despain,

A fast state assignment procedure for synchronous FSMs,

*Proc. of 32nd Design Automation Conf.*, pp. 327-332, Jun. 1995.M. Pedram.

CAD for Low power: status and promising directions,

*Proc. of Int'l Symp. on VLSI Technology, Systems and Applications*, Jun. 1995.S-M. Liu, M. Pedram and A. M. Despain,

Plato_P: PLA timing optimization by partitioning,

*Proc. of 1995 IEEE Int'l Symp. Circuits and Systems*, May 1995.D. Marculescu, R. Marculescu and M. Pedram.

Information theoretic measures for energy consumption at register transfer level,

*Proc. of Int'l Symp. of Low Power Design*, Apr. 1995, pp. 81-86.C-Y. Tsui, M. Pedram. C-H. Chen and A. M. Despain,

Low power state assignment targeting two- and multi-level logic implementations,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1994, pp. 82-87.S. Iman and M. Pedram,

Multi-level network optimization for low power,

*Proc.of Int'l Conf. on Computer Aided Design*, Nov. 1994, pp. 372-377.R. Marculescu, D. Marculescu and M. Pedram.

Switching activity estimation considering spatiotemporal correlations,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1994, pp. 294-299.D. Mukherjee, M. Pedram and M. Breuer,

Control strategies for chip-based DFT/BIST hardware,

*Proc. of Int'l Test Conf.*, Oct. 1994, pp. 893-902.K-R. Pan, Y-T. Lai and M. Pedram.

FPGA Synthesis using OBDD-based function decomposition,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Oct. 1994, pp. 30-35.S. Iman, M. Pedram and K. Chauduary,

Technology mapping using fuzzy logic,

*Proc. of 31st Design Automation Conf.*, Jun. 1994, pp. 333-338.C-Y. Tsui, M. Pedram and A. M. Despain,

Exact and approximate methods for calculating signal and transition probabilities in FSMs,

*Proc. of 31st Design Automation Conf.*, Jun. 1994, pp. 18-23.Y-T. Lai, M. Pedram and S. B. K. Vrudhula,

FGILP: an integer linear program solver based on function graphs,

*Proc.of Int'l Conf. on Computer Aided Design*, Nov. 1993, pp. 685-689.D. Mukherjee, M. Pedram and M. Breuer,

Merging multiple FSM controllers for DFT/BIST hardware,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1993, pp. 720-725.M. Pedram. B. S. Nobandegani and B. T. Preas,

Architecture and routability analysis for row-based FPGAs,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1993, pp. 230-235.C-Y. Tsui, M. Pedram and A. M. Despain,

Efficient estimation of dynamic power dissipation under a real delay model,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1993, pp. 224-228.C-Y. Tsui, M. Pedram and A. M. Despain,

Power estimation considering charging and discharging of internal nodes of CMOS gates,

*Proc. of Synthesis and Simulation Meeting and Int'l Interchange*, Oct. 1993, pp. 345-354.H. Vaishnav and M. Pedram.

PCUBE: performance driven placement algorithm for low power,

*Proc. of European Design Automation Conf.*, Sep. 1993, pp. 72-77.C-Y. Tsui, M. Pedram and A. M. Despain,

Technology decomposition and mapping targeting low power dissipation,

*Proc. of 30th Design Automation Conf.*, Jun. 1993, pp. 68-73.Y-T. Lai, M. Pedram and S. Sastry,

BDD based decomposition of logic functions with application to FPGA synthesis,

*Proc. of 30th Design Automation Conf.*, Jun. 1993, pp. 230-235.H. Vaishnav and M. Pedram.

Routability driven fanout optimization,

*Proc. of 30th Design Automation Conf.*, Jun. 1993, pp. 642-647.M. Pedram and H. Vaishnav,

Technology decomposition using optimal alphabetic trees,

*Proc. of European Conf. on Design Automation*, Feb. 1993, pp. 573-577.S-M. Liu, K-R. Pan, M. Pedram and A. M. Despain,

Alleviating routing congestion by combining logic resynthesis and linear placement,

*Proc. of European Conf. on Design Automation*, Feb. 1993, pp. 578-5822Y-T. Lai, S. Sastry (a.k.a. S. B. K. Vrudhula), and M. Pedram,

Boolean matching using BDDs with applications in logic synthesis and verification,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Oct. 1992, pp. 452-458.D. Mukherjee, M. Pedram. and M. Breuer,

Minimal area merger of FSM controllers,

*Proc. of European Design Automation Conf.*, Sep. 1992, pp. 278-283.K. Chaudhary and M. Pedram,

A near-optimal algorithm for technology mapping minimizing area under delay constraints,

*Proc. of 29th Design Automation Conf.*, Jun. 1992, pp. 492-498.M. Pedram and N. Bhat,

Layout driven logic restructuring and decomposition,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1991, pp. 134-137.S. Mayrhofer, M. Pedram and U. Lauther,

A flow-based approach to the placement of Boolean networks,

*Proc. of IFIP Int'l Conf. on VLSI*, 1991.M. Pedram. K. Chaudhary and E. S. Kuh,

I/O pad assignment based on circuit structure,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Sep. 1991, pp. 314-318.M. Pedram and N. Bhat,

Layout driven technology mapping,

*Proc. of 28th Design Automation Conf.*, Jun. 1991, pp. 99-105.M. Pedram. M. Marek-Sadowska and E. S. Kuh,

Floorplanning with pin assignment,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1990, pp. 98-101 (Distinguished Paper Award for ICCAD 1990).E. S. Kuh, A. Srinivasan, M. A. B. Jackson, M. Pedram. Y. Ogawa and M. Marek-Sadowska,

Timing-driven layout,

*Proc. of Synthesis and Simulation Meeting and Int'l Interchange*, Oct. 1990, pp. 263-270.M. Pedram and B. T. Preas,

Floorplanning with accurate shape constraints for the cells,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Sep. 1990, pp. 332-338.M. Pedram. Y. Ogawa and E. S. Kuh,

Timing-driven placement for general cell layouts,

*Proc. of 1990 IEEE Int'l Symp. Circuits and Systems*, May 1990 pp. 872-876.M. Pedram. B. T. Preas,

Interconnection length estimation for optimized standard cell layouts,

*Proc. of Int'l Conf. on Computer Aided Design*, Nov. 1989, pp. 390-393.M. Pedram. B. T. Preas,

Accurate prediction of physical design characteristics of random logic,

*Proc. of Int'l Conf. on Computer Design: VLSI in Computers and Processors*, Oct. 1989, pp. 100-108.**(Best Paper Award)**B. T. Preas, M. Pedram and D. Curry,

Automatic layout of Silicon-on-Silicon hybrid packages,

*Proc. of 26th Design Automation Conf.*, Jun. 1989, pp. 394-399.B. Eschermann, W-W. Dai, E. S. Kuh and M. Pedram,

Hierarchical placement for macrocells: a `meet-in-the-middle' approach,

*Proc. of Int'l Conf. on Computer Aided Design*, pp. 390-393.

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Pedram; Massoud (Beverly Hills, CA); Iranli; Ali (Los Angeles, CA), United States Patent Filed,

Dynamic backlight scaling for power minimization in a backlit TFT-LCD,

United States Patent**8,094,118**, Issued: Jan 10, 2012, Filed: Mar 2, 2006.Fallah; Farzan (San Jose, CA); Pakbaznia; Ehsan (Los Angeles, CA); Pedram; Massoud (Beverly Hills, CA);

Sizing and placement of charge recycling (CR) transistors in multithreshold complementary metal-oxide-semiconductor (MTCMOS) circuit,

United States Patent**7,834,684**, Issued: Nov 16, 2010, Filed: Oct 31, 2008.Fallah; Farzan (San Jose, CA); Abdollahi; Afshin (Los Angeles, CA); Pedram; Massoud (Los Angeles, CA);

Power mode transition in multi-threshold complementary metal oxide semiconductor (MTCMOS) circuits,

United States Patent**7,613,942**, Issued: November 3, 2009, Filed: May 31, 2006.Fallah; Farzan (San Jose, CA); Amelifard; Behnam (Los Angeles, CA); Pedram; Massoud (Beverly Hills, CA);

Setting threshold voltages of cells in a memory block to reduce leakage in the memory block,

United States Patent**7,573,775**, Issued: August 11, 2009, Filed: February 9, 2007.Fallah; Farzan (San Jose, CA); Amelifard; Behnam (Los Angeles, CA); Pedram; Massoud (Beverly Hills, CA);

PG-Gated Data Retention Technique for Reducing Leakage in Memory Cells,

United States Patent**7,447,101**, Issued: November 4, 2008, Filed: December 22, 2006.Fallah; Farzan (San Jose, CA); Pakbaznia; Ehsan (Los Angeles, CA); Pedram; Massoud (Beverly Hills, CA);

Recycling Charge to Reduce Energy Consumption During Mode Transition in Multi-threshold Complementary Metal-Oxide-Semiconductor (MTCMOS) Circuits,

United States Patent**7,400,175**, Issued: July 15, 2008, Filed: May 30, 2007.Fallah; Farzan (San Jose, CA), Aghaghiri; Yazdan (Los Angeles, CA), Pedram; Massoud (Los Angeles, CA),

System and method for identifying optimal encoding for a given trace,

United States Patent**7,236,107**, Issued: June 26, 2007, Filed: September 20, 2004.Fallah; Farzan (San Jose, CA); Aghaghiri; Yazdan (Los Angeles, CA); Pedram; Massoud (Los Angeles, CA),

Reducing transitions on address buses using instruction-set-aware system and method,

United States Patent**6,907,511**, Issued: June 14, 2005, Filed: January 14, 2003.Fallah; Farzan (San Jose, CA); Aghaghiri; Yazdan (Los Angeles, CA); Pedram; Massoud (Los Angeles, CA),

System and method for reducing transitions on address buses,

United States Patent**6,834,335**, Issued: December 21, 2004, Filed: August 9, 2002.Fallah; Farzan (San Jose, CA); Aghaghiri; Yazdan (Los Angeles, CA); Pedram; Massoud (Los Angeles, CA), United States Patent

**6,813,700**,Reduction of bus switching activity using an encoder and decoder,

Issued: November 2, 2004, Filed: June 3, 2002.